Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 8 - Arrangements for selecting an address in a digital store
Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368)
10/2003
10/07/2003US6631085 Three-dimensional memory array incorporating serial chain diode stack
10/07/2003US6630856 High-speed bank select multiplexer latch
10/07/2003US6630704 Semiconductor device
10/02/2003WO2003081602A1 A volumetric data storage apparatus comprising a plurality of stacked matrix-addressable memory devices
10/02/2003WO2003081596A1 Asynchronous interface circuit and method for a pseudo-static memory device
10/02/2003US20030185088 Semiconductor memory device with internal clock generation circuit
10/02/2003US20030185044 Semiconductor memory device
10/02/2003US20030184355 RDLL circuit for area reduction
10/02/2003CA2480307A1 A volumetric data storage apparatus comprising a plurality of stacked matrix-addressable memory devices
10/01/2003CN1446402A Timer circuit and semiconductor memory incorporating the timer circuit
10/01/2003CN1446358A High‰Àspeed DRAM structure with uniform access latency
09/2003
09/30/2003US6629223 Method and apparatus for accessing a memory core multiple times in a single clock cycle
09/30/2003US6629190 Non-redundant nonvolatile memory and method for sequentially accessing the nonvolatile memory using shift registers to selectively bypass individual word lines
09/30/2003US6628566 Synchronous semiconductor memory device for controlling cell operations by using frequency information of a clock signal
09/30/2003US6628565 Predecode column architecture and method
09/30/2003US6628564 Semiconductor memory device capable of driving non-selected word lines to first and second potentials
09/30/2003US6628555 Semiconductor circuit having a detection circuit for controlling a power boosting circuit
09/30/2003US6628554 MIS semiconductor device having improved gate insulating film reliability
09/30/2003US6628540 Bias cell for four transistor (4T) SRAM operation
09/30/2003US6628536 Semiconductor memory device
09/30/2003US6628155 Internal clock generating circuit of semiconductor memory device and method thereof
09/30/2003US6627960 Semiconductor data storage apparatus
09/25/2003WO2003079363A1 System and methods for addressing a matrix
09/25/2003WO2003079202A1 Memory system using directional coupler for address
09/25/2003US20030179644 Synchronous global controller for enhanced pipelining
09/25/2003US20030179642 Distributed, highly configurable modular predecoding
09/25/2003US20030179640 Synchronous controlled, self-timed local sram block
09/25/2003US20030179639 Memory with address management
09/25/2003US20030179638 Low power domino tree decoder
09/25/2003US20030179637 Flexible integrated memory
09/25/2003US20030179612 Asynchronous interface circuit and method for a pseudo-static memory device
09/25/2003US20030179598 Device for selectively providing read-only data
09/24/2003EP1347457A2 Synchronous controlled, self-timed local SRAM block
09/24/2003CN1444230A Semiconductor storage device
09/23/2003US6625713 Memory controller and method for managing a logical/physical address control table
09/23/2003US6625706 ATD generation in a synchronous memory
09/23/2003US6625067 Semiconductor memory device for variably controlling drivability
09/23/2003US6625051 Semiconductor integrated circuit
09/23/2003US6625049 Low power memory module using restricted RAM activation
09/23/2003US6624679 Stabilized delay circuit
09/18/2003WO2002061806A3 Dram cell having a capacitor structure fabricated partially in a cavity and method for operating same
09/18/2003US20030174574 Write pulse circuit for a magnetic memory
09/18/2003US20030174573 Semiconductor memory device
09/18/2003US20030174547 Memory device which can change control by chip select signal
09/18/2003US20030174544 Data output driver of semiconductor memory device
09/17/2003EP1344221A2 Word line decoding architecture in a flash memory
09/17/2003CN1121695C Semiconductor memory device
09/16/2003US6621762 Non-volatile delay register
09/16/2003US6621759 Memory wordline decoder having signal-driving amplifier
09/16/2003US6621757 Semiconductor memory device having asymmetric data paths
09/16/2003US6621756 Compact integrated circuit with memory array
09/16/2003US6621752 Refreshing scheme for memory cells a memory array to increase performance of integrated circuits
09/16/2003US6621749 Integrated circuit memory devices providing per-bit redundancy and methods of operating same
09/16/2003US6621747 Integrated data input sorting and timing circuit for double data rate (DDR) dynamic random access memory (DRAM) devices
09/16/2003US6621745 Row decoder circuit for use in programming a memory device
09/16/2003US6621315 Delay locked loop circuit and method having adjustable locking resolution
09/16/2003US6621292 Semiconductor integrated circuits with power reduction mechanism
09/12/2003WO2003075350A1 Integrated read-only memory, method for operating said read-only memory and corresponding production method
09/12/2003WO2003075280A1 Semiconductor storing device
09/11/2003US20030169632 Device and method for repairing a memory array by storing each bit in multiple memory cells in the array
09/11/2003US20030169617 Semiconductor memory device
09/10/2003EP1342243A2 Memory device and method for the operation of the same
09/10/2003EP1254459B1 Voltage boost level clamping circuit for a flash memory
09/10/2003EP1157387B1 Full page increment/decrement burst for ddr sdram/sgram
09/10/2003CN1441954A Semiconductor memory and control method
09/09/2003US6618342 Spatially-spectrally swept optical memories and addressing methods
09/09/2003US6618302 Memory architecture with single-port cell and dual-port (read and write) functionality
09/09/2003US6618295 Method and apparatus for biasing selected and unselected array lines when writing a memory array
09/09/2003US6618288 Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics
09/09/2003US6618286 Non-volatile semiconductor memory device with a memory array preventing generation of a through current path
09/09/2003US6617907 Voltage translator
09/03/2003EP1341181A2 Semiconductor devices, circuits and mehtods for synchronizing the inputting and outputting data by internal clock signals derived from single feedback loop
09/03/2003EP1256116B1 Flash memory architecture employing three layer metal interconnect
09/03/2003CN1440553A Addressing of memory matrix
09/02/2003US6614712 Semiconductor memory device
09/02/2003US6614711 Row decoder scheme for flash memory devices
09/02/2003US6614710 Semiconductor memory device and data read method thereof
09/02/2003US6614705 Dynamic random access memory boosted voltage supply
09/02/2003US6614698 Method and apparatus for synchronous data transfers in a memory device with selectable data or address paths
09/02/2003US6614697 Diode-based multiplexer
09/02/2003US6614682 Magnetic material memory and information reproducing method of the same
08/2003
08/28/2003US20030163643 Bank conflict determination
08/28/2003US20030161210 Control circuit for an S-DRAM
08/28/2003US20030161208 Semiconductor memory device, refresh control method thereof, and test method thereof
08/28/2003US20030161203 Multi-level semiconductor memory architecture and method of forming the same
08/27/2003EP1339069A1 Word line selector for a semiconductor memory
08/27/2003EP1339064A2 Semiconductor memory device
08/27/2003CN1119816C Synchronous semiconductor storage device having timed circuit of controlling activation/non-activation of word line
08/27/2003CN1119809C Nonvolatile memory blocking arckitecture and redundancy
08/26/2003US6611943 Method of designing semiconductor integrated circuit device and semiconductor integrated circuit device
08/26/2003US6611904 Memory access address comparison
08/26/2003US6611885 Method and apparatus for synchronous data transfers in a memory device with selectable data or address paths
08/26/2003US6611862 User station software that controls transport and presentation of content from a remote source
08/26/2003US6611474 Semiconductor device
08/26/2003US6611466 Semiconductor memory device capable of adjusting the number of banks and method for adjusting the number of banks
08/26/2003US6611464 Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics
08/21/2003WO2003012794A3 Random access decoder
08/21/2003US20030156489 Semiconductor integrated circuit equipment with asynchronous operation
08/21/2003US20030156485 Semiconductor memory device having divided word line structure
08/21/2003US20030156484 Fast accessing of a memory device
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