Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
08/2001
08/07/2001US6272066 Synchronous semiconductor memory device capable of high speed reading and writing
08/07/2001US6272065 Address generating and decoding circuit for use in burst-type random access memory device having a double data rate, and an address generating method thereof
08/07/2001US6272064 Memory with combined synchronous burst and bus efficient functionality
08/07/2001US6272063 Semiconductor memory device
08/07/2001US6272062 Semiconductor memory with programmable bitline multiplexers
08/07/2001US6272061 Semiconductor integrated circuit device having fuses and fuse latch circuits
08/07/2001US6272059 Bit line sense-amplifier for a semiconductor memory device and a method for driving the same
08/07/2001US6272058 Semiconductor memory device capable of performing data reading/writing in units of plurality of bits
08/07/2001US6272057 Semiconductor memory device
08/07/2001US6272056 Semiconductor memory device capable of implementing redundancy-based repair efficiently in relation to layout and operating speed and semiconductor integrated circuit device having such semiconductor memory device
08/07/2001US6272055 Semiconductor memory device
08/07/2001US6272053 Semiconductor device with common pin for address and data
08/07/2001US6272052 Block-erase type semiconductor storage device with independent memory groups having sequential logical addresses
08/07/2001US6272044 Semiconductor storage device and method of driving thereof
08/07/2001US6272041 MTJ MRAM parallel-parallel architecture
08/07/2001US6272040 System and method for programming a magnetoresistive memory device
08/07/2001US6272039 Temperature insensitive capacitor load memory cell
08/07/2001US6272038 High-density non-volatile memory devices incorporating thiol-derivatized porphyrin trimers
08/07/2001US6272037 Ferroelectric memory device and method for generating reference level signal therefor
08/07/2001US6272036 Control of magnetic direction in multi-layer ferromagnetic devices by bias voltage
08/07/2001US6272034 Semiconductor memory device
08/07/2001US6271718 Internal voltage converter for low operating voltage semiconductor memory
08/07/2001US6271717 Bias circuit for series connected decoupling capacitors
08/07/2001US6271710 Temperature dependent circuit, and current generating circuit, inverter and oscillation circuit using the same
08/07/2001US6271705 Data output circuits having enhanced ESD resistance and related methods
08/07/2001US6271697 Semiconductor integrated circuit device
08/07/2001US6271687 Sense amplifier circuit
08/07/2001US6271568 Voltage controlled resistance modulation for single event upset immunity
08/07/2001US6271560 Single-poly EPROM cell with CMOS compatible programming voltages
08/07/2001US6270182 Inkjet print head recapping mechanism
08/02/2001WO2001056035A2 It flash memory recovery scheme for over-erasure
08/02/2001WO2000079298A3 Magnetic systems with irreversible characteristics and a method of manufacturing and repairing and operating such systems
08/02/2001US20010010654 Multiple ports memory-cell structure
08/02/2001US20010010653 Semiconductor integrated circuit and method for adjusting characteristics of the same
08/02/2001US20010010652 Semiconductor memory device capable of reducing data test time in pipeline
08/02/2001US20010010651 Semiconductor integrated circuit
08/02/2001US20010010650 Semiconductor memory device having operation delay function of column address strobe command, and buffer and signal transmission circuit which are applied to the semiconductor memory device
08/02/2001US20010010646 Nonvolatile semiconductor memory device
08/02/2001US20010010645 Semiconductor memory device
08/02/2001US20010010644 Non-volatile memory device
08/02/2001US20010010642 Static random access memory (SRAM) array central global decoder system and method
08/02/2001US20010010641 Memory array architecture, method of operating a dynamic random access memory, and method of manufacturing a dynamic random access memory
08/02/2001US20010010640 Semiconductor memory device
08/02/2001US20010010480 Semiconductor integrated circuit and method for generating internal supply voltage in semiconductor integrated circuit
08/02/2001US20010010478 Level detection by voltage addition/subtraction
08/02/2001US20010010459 Drive power supplying method for semiconductor memory device and semiconductor memory device
08/02/2001DE19944738C2 Segmentierte Wortleitungsarchitektur zur Aufteilung einer Wortleitung in mehrere Bänke für Zellenfelder mit langen Bitleitungen Segmented wordline architecture for sharing a word line into multiple banks for cell arrays with long bitlines
08/02/2001DE10102626A1 Signalübertragungsschaltung, Puffer und zugehöriges Halbleiterspeicherbauelement Signal transmission circuit, buffers and related semiconductor memory device
08/02/2001DE10102405A1 Halbleiterspeicherbauelement mit datenübertragender Pipeline A semiconductor memory device having data-transferring pipeline
08/02/2001DE10065785A1 Halbleiterspeichervorrichtung A semiconductor memory device
08/02/2001DE10065476A1 Halbleiter-Speicheranordnung und Verfahren für deren Bit-Leitungsverbindung A semiconductor memory device and methods for their bit line connection
08/02/2001DE10064537A1 Halbleiterspeichervorrichtung A semiconductor memory device
08/02/2001DE10047176A1 Halbleiterspeicheranordnung, welche mit einer Erzeugungseinrichtung für ein internes Taktsignal für eine spezielle Betriebsart ausgestattet ist A semiconductor memory device, which is equipped with a device for generating an internal clock signal for a particular operating mode
08/02/2001DE10046022A1 Nichtflüchtige Halbleiterspeichervorrichtung mit einer Konstruktion zum Speichern mehrwertiger Daten und Datenablagesystem, das diese nichtflüchtige Halbleiterspeichervorrichtung enthält The nonvolatile semiconductor memory device having a structure for storing multi-value data and data storage system that contains these non-volatile semiconductor memory device
08/02/2001DE10042622A1 Halbleitervorrichtung mit einem Testmodus und Halbleitertestverfahren, welches dieselbe benutzt A semiconductor device having a test mode and semiconductor test method using the same
08/02/2001DE10002374A1 Halbleiter-Speicheranordnung mit Auffrischungslogikschaltung sowie Verfahren zum Auffrischen des Speicherinhaltes einer Halbleiter-Speicheranordnung A semiconductor memory device with refresh logic circuit and method of refreshing the memory content of a semiconductor memory arrangement
08/02/2001DE10001371A1 Integrierte Schaltung mit einem Differenzverstärker An integrated circuit with a differential amplifier
08/01/2001EP1120791A1 Semiconductor device
08/01/2001EP1120790A1 Magnetic memory with structures that prevent disruptions to magnetization in sense layers
08/01/2001EP1119862A1 Read/write buffers for complete hiding of the refresh of a semiconductor memory and method of operating same
08/01/2001EP1119861A1 Self-referencing ferroelectric memory
08/01/2001EP1119860A2 Magnetoresistive memory having improved interference immunity
08/01/2001EP1119858A1 Decoder element for producing an output signal with three different potentials and operating method for said decoder element
08/01/2001EP0927422B1 Method and apparatus for providing external access to internal integrated circuit test circuits
07/2001
07/31/2001US6269462 Selectable sense amplifier delay circuit and method
07/31/2001US6269280 Semiconductor device and method of fabricating the same
07/31/2001US6269098 Method and apparatus for scaling number of virtual lans in a switch using an indexing scheme
07/31/2001US6269051 Semiconductor device and timing control circuit
07/31/2001US6269050 Internal clock generating circuit of synchronous type semiconductor memory device and method thereof
07/31/2001US6269048 Semiconductor memory device for inputting/outputting data through a common terminal and outputting data in synchronism with clock
07/31/2001US6269047 Semiconductor memory device
07/31/2001US6269046 Semiconductor memory device having improved decoders for decoding row and column address signals
07/31/2001US6269044 Semiconductor memory device employing an abnormal current consumption detection scheme
07/31/2001US6269041 Embedded auto-refresh circuit for pseudo static random access memory
07/31/2001US6269039 System and method for refreshing memory devices
07/31/2001US6269038 Semiconductor memory device with test mode decision circuit
07/31/2001US6269037 Variable equilibrate voltage circuit for paired digit lines
07/31/2001US6269035 Circuit and method for a multiplexed redundancy scheme in a memory device
07/31/2001US6269034 Semiconductor memory having a redundancy judgment circuit
07/31/2001US6269033 Semiconductor memory device having redundancy unit for data line compensation
07/31/2001US6269032 Electronic control unit having voltage responsive data writing
07/31/2001US6269031 Semiconductor memory device
07/31/2001US6269030 Semiconductor memory device
07/31/2001US6269029 Semi-conductor memory device
07/31/2001US6269028 Method and apparatus for multistage readout operation
07/31/2001US6269027 Non-volatile storage latch
07/31/2001US6269023 Method of programming a non-volatile memory cell using a current limiter
07/31/2001US6269021 Memory cell of nonvolatile semiconductor memory device
07/31/2001US6269020 FIFO configuration cell
07/31/2001US6269019 Ferroelectric memory device capable of adjusting bit line capacitance
07/31/2001US6269018 Magnetic random access memory using current through MTJ write mechanism
07/31/2001US6269017 Multi level mask ROM with single current path
07/31/2001US6269016 MRAM cam
07/31/2001US6268761 Booster circuit
07/31/2001US6268747 Dynamic voltage sense amplifier
07/31/2001US6268746 Method and apparatus for logic synchronization
07/31/2001US6267905 Method of manufacture of a permanent magnet electromagnetic ink jet printer
07/31/2001US6267904 Method of manufacture of an inverted radial back-curling thermoelastic ink jet
07/26/2001WO2001054280A1 Programmable array logic circuit employing non-volatile ferromagnetic memory cells
07/26/2001WO2001054279A1 A register having a ferromagnetic memory cells