| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
|---|
| 01/29/2004 | US20040019736 Portable flash memory with extended memory capacity |
| 01/29/2004 | US20040018725 Unitary interconnection structures integral with a dielectric layer and fabrication methods thereof |
| 01/29/2004 | US20040017721 Magnetic storage device |
| 01/29/2004 | US20040017720 Semiconductor memory |
| 01/29/2004 | US20040017719 Method and apparatus for saving refresh current |
| 01/29/2004 | US20040017718 Non-volatile semiconductor memory device conducting read operation using a reference cell |
| 01/29/2004 | US20040017717 Differential amplifier circuit with high amplification factor and semiconductor memory device using the differential amplifier circuit |
| 01/29/2004 | US20040017716 Dynamic RAM-and semiconductor device |
| 01/29/2004 | US20040017715 Semiconductor memory device |
| 01/29/2004 | US20040017714 Synchronous SRAM-compatible memory and method of driving the same |
| 01/29/2004 | US20040017713 Ferroelectric memory supplying predetermined amount of direct-current bias electricity to first and second bit lines upon reading data from memory cell |
| 01/29/2004 | US20040017712 Circuit for non-destructive, self-normalizing reading-out of MRAM memory cells |
| 01/29/2004 | US20040017706 MRAM configuration |
| 01/29/2004 | US20040017705 A Semiconductor memory device having improved arrangement for replacing failed bit lines |
| 01/29/2004 | US20040017704 Ferroelectric memory device and method for reading data from the same |
| 01/29/2004 | US20040017700 Method and apparatus for synchronization of row and column access operations |
| 01/29/2004 | US20040017699 Semiconductor memory device in which data are read and written asynchronously with application of address signal |
| 01/29/2004 | US20040017696 Method and apparatus for regulating predriver for output buffer |
| 01/29/2004 | US20040017693 Method for programming, reading, and erasing a non-volatile memory with multi-level output currents |
| 01/29/2004 | US20040017691 Multiple subarray DRAM having a single shared sense amplifier |
| 01/29/2004 | US20040017639 High-stability low-offset-field double-tunnel-junction sensor |
| 01/29/2004 | US20040017373 Dual mode DDR SDRAM/SGRAM |
| 01/29/2004 | US20040017241 Clock control method and circuit |
| 01/29/2004 | US20040017160 Field emission display |
| 01/29/2004 | US20040016975 Semiconductor memory device with data input/output organization in multiples of nine bits |
| 01/29/2004 | US20040016943 Quantum magnetic memory |
| 01/29/2004 | DE4239318B4 Vorrichtung zum Erfassen des Einschaltens einer Versorgungsspannung Apparatus for detecting the switching on of a supply voltage |
| 01/29/2004 | DE10330920A1 Statische Speicherzelle mit Dual-Port und zugehöriger Halbleiterspeicherbaustein Static memory cell having dual-port semiconductor memory device and associated |
| 01/29/2004 | DE10330487A1 Halbleiterspeicherbaustein mit einem Abtastsystem mit Offsetkompensation A semiconductor memory device with a scanning system with offset compensation |
| 01/29/2004 | DE10330072A1 DRAM cell array region for consumer, commercial and industrial applications, has nodes that are laterally offset from respective source regions along one direction and placed on substrate including MOS transistors |
| 01/29/2004 | DE10318183A1 Permanente Chip-ID unter Verwendung eines FeRAM Permanent chip ID using a FeRAM |
| 01/29/2004 | DE10313365A1 Genauigkeitsbestimmung bei Bitleitungsspannungmessungen Accuracy in determination Bitleitungsspannungmessungen |
| 01/29/2004 | DE10311085A1 Halbleiterspeicher Semiconductor memory |
| 01/29/2004 | DE10232386A1 Verfahren zum Speichern von Information in einem ferroelektrischen Material, Verfahren zum Auslesen von in einem ferroelektrischen Material gespeicherter Information sowie Vorrichtung zum Speichern von Information und Auslesen in einem ferroelektrischen Material A method for storing information in a ferroelectric material, method of reading in a ferroelectric material stored as well as means for storing and reading information in a ferroelectric material, |
| 01/28/2004 | EP1385203A2 Nonvolatile solid-state magnetic memory, method for controlling coercive force of nonvolatile solid-state magnetic memory, and method for recording in nonvolatile solid-state magnetic memory |
| 01/28/2004 | EP1385173A1 Associative memory, method for searching the same, network device, and network system |
| 01/28/2004 | EP1385172A2 Semiconductor memory |
| 01/28/2004 | EP1385171A2 Method for recording in a nonvolatile solid-state magnetic memory |
| 01/28/2004 | EP1384232A1 Dynamic data restore in thyristor-based memory device |
| 01/28/2004 | EP1384231A2 Method and apparatus for completely hiding refresh operations in a dram device using multiple clock division |
| 01/28/2004 | EP1339111A9 Contact structure, phase change memory cell, and manufacturing method thereof with elimination of double contacts |
| 01/28/2004 | CN1471712A Non-volatile passive matrix and method for read out of the same |
| 01/28/2004 | CN1471711A Sensing device for a passive matrix memory and a read method for use therewith |
| 01/28/2004 | CN1471710A Method and system for hiding refreshes in a dynamic random access memory |
| 01/28/2004 | CN1471170A Semiconductor storage |
| 01/28/2004 | CN1471164A 半导体器件 Semiconductor devices |
| 01/28/2004 | CN1471107A Semiconductor storage device with offset-compensation read-out system |
| 01/28/2004 | CN1471106A Read-out circuit |
| 01/28/2004 | CN1136582C Internal-circuit timed external regulation circuit and method therefor |
| 01/28/2004 | CN1136581C Non-volatile semiconductor memory device |
| 01/28/2004 | CN1136579C Memory circuits and redundancy scheme used therein |
| 01/27/2004 | US6684345 Flash EEprom system |
| 01/27/2004 | US6684316 Storage access unit for selective access to a static storage unit or dynamic storage unit and associated access procedures |
| 01/27/2004 | US6684285 Synchronous integrated circuit device |
| 01/27/2004 | US6683816 Access control system for multi-banked DRAM memory |
| 01/27/2004 | US6683815 Magnetic memory cell and method for assigning tunable writing currents |
| 01/27/2004 | US6683814 Memory device and method having data path with multiple prefetch I/O configurations |
| 01/27/2004 | US6683813 Semiconductor memory device equipped with dummy cells |
| 01/27/2004 | US6683812 Semiconductor memory having electrically erasable and programmable semiconductor memory cells |
| 01/27/2004 | US6683811 Nonvolatile memory system, semiconductor memory, and writing method |
| 01/27/2004 | US6683810 Non-volatile memory and method of non-volatile memory programming |
| 01/27/2004 | US6683807 Thin film magnetic memory device for programming required information with an element similar to a memory cell and information programming method |
| 01/27/2004 | US6683806 Methods of operating MRAM devices |
| 01/27/2004 | US6683805 Suppression of leakage currents in VLSI logic and memory circuits |
| 01/27/2004 | US6683804 Read/write memory arrays and methods with predetermined and retrievable latent-state patterns |
| 01/27/2004 | US6683803 Apparatus and methods for data storage and retrieval |
| 01/27/2004 | US6683802 Magnetic memory device in which influence of adjacent memory cell is controllable |
| 01/27/2004 | US6683767 Semiconductor integrated circuit |
| 01/27/2004 | US6683491 Semiconductor integrated circuit |
| 01/27/2004 | US6683478 Apparatus for ensuring correct start-up and phase locking of delay locked loop |
| 01/27/2004 | US6683445 Internal power voltage generator |
| 01/27/2004 | US6683353 Semiconductor integrated circuit device |
| 01/27/2004 | US6683338 Structure and method for transverse field enhancement |
| 01/27/2004 | US6682970 Capacitor/antifuse structure having a barrier-layer electrode and improved barrier layer |
| 01/27/2004 | US6682176 Ink jet printhead chip with nozzle arrangements incorporating spaced actuating arms |
| 01/23/2004 | CA2433112A1 Cubic memory array |
| 01/23/2004 | CA2419013A1 Portable flash memory with extended memory capacity |
| 01/22/2004 | WO2004008536A1 Magnetic non-volatile memory element |
| 01/22/2004 | WO2004008453A1 Method for storing and/or reading information in/out of a ferroelectric material |
| 01/22/2004 | WO2004008329A1 Dram supporting different burst-length accesses without changing the burst length setting in the mode register |
| 01/22/2004 | WO2003088459A3 Low-power driver with energy recovery |
| 01/22/2004 | US20040015663 Circuit for generating column selection control signal in memory device |
| 01/22/2004 | US20040015646 DRAM for high-speed data access |
| 01/22/2004 | US20040015645 System, apparatus, and method for a flexible DRAM architecture |
| 01/22/2004 | US20040015643 Method and related circuit for accessing locations of a ferroelectric memory |
| 01/22/2004 | US20040015640 Internal voltage level control circuit, semiconductor storage, and method for controlling them |
| 01/22/2004 | US20040014283 Fabrication method of semiconductor device |
| 01/22/2004 | US20040014247 Memory cell array having ferroelectric capacity, method of manufacturing the same and ferroelectric memory device |
| 01/22/2004 | US20040014246 Method for manufacturing MTJ cell of magnetic random access memory |
| 01/22/2004 | US20040014243 Magnetoresistive memory or sensor devices having improved switching properties and method of fabrication |
| 01/22/2004 | US20040013023 Semiconductor integrated circuit |
| 01/22/2004 | US20040013022 Integrated magnetoresistive semiconductor memory configuration |
| 01/22/2004 | US20040013021 Bus interface circuit and receiver circuit |
| 01/22/2004 | US20040013017 Ferroelectric memory device and read control method thereof |
| 01/22/2004 | US20040013016 Semiconductor circuit device capable of accurately testing embedded memory |
| 01/22/2004 | US20040013013 Memory, module with crossed bit lines, and method for reading the memory module |
| 01/22/2004 | US20040013012 Data write circuit in memory system and data write method |
| 01/22/2004 | US20040013010 Column address path circuit and method for memory devices having a burst access mode |
| 01/22/2004 | US20040013005 Method and apparatus for reducing gate-induced diode leakage in semiconductor devices |
| 01/22/2004 | US20040013001 Flash memory cell and method of manufacturing the same and programming/erasing/reading method of flash memory cell |