Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
12/2003
12/31/2003WO2004001801A2 Insulated-gate semiconductor device and approach involving junction-induced intermediate region
12/31/2003WO2004001762A1 Semiconductor memory
12/31/2003WO2004001761A1 Semiconductor memory
12/31/2003WO2004001760A1 Ferroelectric memory with series connected memory cells
12/31/2003WO2003077258A3 Magnetic flux concentrating cladding material on conductive lines of mram
12/31/2003WO2003063171A3 Noise reduction technique for transistors and small devices utilizing an episodic agitation
12/31/2003WO2003063169A3 Magnetoresistive memory devices and assemblies; and methods of storing and retrieving information
12/31/2003WO2003054886A3 Increased magnetic stability devices suitable for use as sub-micron memories
12/31/2003WO2003046990A3 Method and apparatus for standby power reduction in semiconductor devices
12/31/2003WO2003044800A3 Asymmetric mram cell and bit design for improving bit yield
12/31/2003WO2003036450A3 Dram power management
12/31/2003WO2003030176A3 Memory array employing integral isolation transistors
12/31/2003WO2003001532A3 Current source and drain arrangement for magnetoresistive memories (mrams)
12/31/2003WO2002086905A3 Ferroelectric memory and operating method therefor
12/31/2003WO2001050228A3 Low latency multi-level communication interface
12/31/2003CN1465095A High-speed low-power semiconductor memory architecture
12/31/2003CN1465073A Mram architectures for increased write selectivity
12/31/2003CN1133270C Latch circuit and semiconductor integrated circuit having latch circuit
12/31/2003CN1133174C Semiconductor memory device and method of burn-in testing
12/31/2003CN1133170C Latching type read amplifier circuit
12/31/2003CN1133169C Internal constant voltage control circuit for memory device
12/31/2003CN1132738C Packing material, base material for adhesive tape, or separator
12/30/2003US6671815 Low power consumption semiconductor integrated circuit device and microprocessor
12/30/2003US6671788 Synchronous semiconductor memory device having a burst mode for improving efficiency of using the data bus
12/30/2003US6671787 Semiconductor memory device and method of controlling the same
12/30/2003US6671710 Methods of computing with digital multistate phase change materials
12/30/2003US6671220 Semiconductor device having simplified internal data transfer
12/30/2003US6671218 System and method for hiding refresh cycles in a dynamic type content addressable memory
12/30/2003US6671217 Semiconductor device using high-speed sense amplifier
12/30/2003US6671213 Thin film magnetic memory device having redundancy repair function
12/30/2003US6671212 Method and apparatus for data inversion in memory device
12/30/2003US6671210 Three-transistor pipelined dynamic random access memory
12/30/2003US6671207 Piggyback programming with staircase verify for multi-level cell flash memory designs
12/30/2003US6671201 Method for writing data into a semiconductor memory device and semiconductor memory therefor
12/30/2003US6671200 Ferroelectric random access memory with isolation transistors coupled between a sense amplifier and an equalization circuit
12/30/2003US6671199 Data storage method for semiconductor integrated circuit, semiconductor integrated circuit, semiconductor device equipped with many of the semiconductor integrated circuits, and electronic apparatus using the semiconductor device
12/30/2003US6671198 Semiconductor device
12/30/2003US6671040 Programming methods and circuits for semiconductor memory cell and memory array using a breakdown phenomena in an ultra-thin dielectric
12/30/2003US6670802 Integrated circuit having a test operating mode and method for testing a multiplicity of such circuits
12/30/2003US6670669 Multiple-bit non-volatile memory utilizing non-conductive charge trapping gate
12/30/2003US6670665 Memory module with improved electrical properties
12/30/2003US6670661 Ferroelectric memory cell with diode structure to protect the ferroelectric during read operations
12/30/2003US6670660 Semiconductor memory device utilizing tunnel magneto resistive effects and method for manufacturing the same
12/30/2003US6670659 Ferroelectric data processing device
12/30/2003US6670642 Semiconductor memory device using vertical-channel transistors
12/30/2003US6670240 Twin NAND device structure, array operations and fabrication method
12/30/2003US6669787 Oxidizing ferromagnetic material of sense layer, depositing aluminium on oxidized ferromagnetic material of sense layer, whereafter this aluminium oxidizes to an aluminium oxide film using oxygen from oxidized ferromagnetic material
12/25/2003WO2003107426A1 Memory device having a semiconducting polymer film
12/25/2003US20030237033 System for testing a group of functionally independent memories and for replacing failing memory words
12/25/2003US20030237011 Memory integrated circuit
12/25/2003US20030236958 Method and circuit for increasing the memory access speed of an enhanced synchronous SDRAM
12/25/2003US20030236641 Method and system of calibrating the control delay time
12/25/2003US20030235107 Memory systems and methods of operating the same in which an active termination value for a memory device is determined at a low clock frequency and commands are applied to the memory device at a higher clock frequency
12/25/2003US20030235106 Delay locked loop control circuit
12/25/2003US20030235105 Semiconductor integrated circuit
12/25/2003US20030235104 Standby current reduction circuit applied in DRAM
12/25/2003US20030235101 Semiconductor integrated circuit device
12/25/2003US20030235095 Semiconductor memory device with an improved memory cell structure and method of operating the same
12/25/2003US20030235090 Semiconductor memory device with reduced package test time
12/25/2003US20030235089 Memory array with diagonal bitlines
12/25/2003US20030235078 Deep wordline trench to shield cross coupling between adjacent cells for scaled nand
12/25/2003US20030235074 Magnetic memory device
12/25/2003US20030235072 Magnetic random access memory (MRAM) for spontaneous hall effect and method of writing and reading data using the MRAM
12/25/2003US20030235071 Magnetic memory device having XP cell and STr cell in one chip
12/25/2003US20030235070 Thin film magnetic memory device and semiconductor integrated circuit device including the same as one of circuit blocks
12/25/2003US20030235069 Thin film magnetic memory device conducting read operation by a self-reference method
12/25/2003US20030235068 Row and column line geometries for improving MRAM write operations
12/25/2003US20030235067 Ferroelectric non-volatile memory device, and driving method thereof
12/25/2003US20030235066 Ferroelectric write once read only memory for archival storage
12/25/2003US20030234664 Data bus
12/25/2003US20030234430 Method and apparatus to make a semiconductor chip susceptible to radiation failure
12/25/2003US20030234413 FeRAM semiconductor memory
12/25/2003US20030234406 Semiconductor device having standby mode and active mode
12/25/2003US20030234397 Semiconductor memory cell and semiconductor memory device
12/24/2003WO2003107424A1 Magnetoresistive random-access memory device
12/24/2003WO2003107355A1 Method and apparatus for soft defect detection in a memory
12/24/2003WO2003107350A2 Magnetoresistive random access memory with reduced switching field
12/24/2003WO2003107349A2 Methods and apparatus for delay circuit
12/24/2003WO2003107316A1 Mram in-pixel memory for display devices
12/24/2003WO2003015101A3 Random-access memory devices comprising a dioded buffer
12/24/2003WO2002059941A3 A self-aligned cross-point mram device with aluminum metallization layers
12/24/2003CN1463443A Propagation delay independent SDRAM data capture device and method
12/24/2003CN1463036A Chip of memory, chip-on-chip device of using same and its mfg. method
12/24/2003CN1463010A Magnetoresistive effect component and magnetic memory with such component
12/24/2003CN1463009A Thin film magnet storage device set with false unit
12/24/2003CN1132311C Semiconductor delay circuit
12/24/2003CN1132246C Acceleration test method of semiconductor memory
12/24/2003CN1132234C 通过采用光滑底电极结构具有改进的存储保持的薄膜铁电电容器 By using a smooth bottom electrode structure having improved storage holding film ferroelectric capacitor
12/24/2003CN1132190C Output circuit of semiconductor memory device
12/24/2003CN1132189C Synchronous semiconductor memory device in which burst counter is commonly employed for data writing and for data reading
12/24/2003CN1132188C Semiconductor memory device having plurality of banks
12/24/2003CN1132187C Row redundancy block architecture of random memory
12/24/2003CN1132111C Microprocessor
12/23/2003US6668345 Synchronous semiconductor allowing replacement with redundant memory cell while maintaining access time
12/23/2003US6668344 Semiconductor integrated circuit with memory redundancy circuit
12/23/2003US6668031 Synchronized data capturing circuits using reduced voltage levels and methods therefor
12/23/2003US6667933 Semiconductor memory and method of operating the same
12/23/2003US6667929 Power governor for dynamic RAM
12/23/2003US6667927 Refresh initiated precharge technique for dynamic random access memory arrays using look-ahead refresh
12/23/2003US6667925 Semiconductor device having temperature detecting function, testing method, and refresh control method of semiconductor storage device having temperature detecting function
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