| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 03/30/2004 | US6714478 Semiconductor memory device having divided word line structure |
| 03/30/2004 | US6714477 Semiconductor integrated circuit device with memory blocks and a write buffer capable of storing write data from an external interface |
| 03/30/2004 | US6714476 Memory array with dual wordline operation |
| 03/30/2004 | US6714475 Fast accessing of a memory device using decoded address during setup time |
| 03/30/2004 | US6714474 Method of checking the state of a capacitor fuse in which the voltage applied to the capacitor fuse is the same level as voltage applied to memory cells |
| 03/30/2004 | US6714473 Method and architecture for refreshing a 1T memory proportional to temperature |
| 03/30/2004 | US6714471 Semiconductor memory device having preamplifier with improved data propagation speed |
| 03/30/2004 | US6714469 On-chip compression of charge distribution data |
| 03/30/2004 | US6714468 Circuit and method for testing a memory device |
| 03/30/2004 | US6714467 Block redundancy implementation in heirarchical RAM's |
| 03/30/2004 | US6714465 Memory device and process for improving the state of a termination |
| 03/30/2004 | US6714464 System and method for a self-calibrating sense-amplifier strobe |
| 03/30/2004 | US6714463 Semiconductor memory device having reduced chip select output time |
| 03/30/2004 | US6714462 Method and circuit for generating constant slew rate output signal |
| 03/30/2004 | US6714461 Semiconductor device with data output circuit having slew rate adjustable |
| 03/30/2004 | US6714460 System and method for multiplexing data and data masking information on a data bus of a memory device |
| 03/30/2004 | US6714457 Parallel channel programming scheme for MLC flash memory |
| 03/30/2004 | US6714456 Process for making and programming and operating a dual-bit multi-level ballistic flash memory |
| 03/30/2004 | US6714455 Memory apparatus including programmable non-volatile multi-bit memory cell, and apparatus and method for demarcating memory states of the cell |
| 03/30/2004 | US6714449 Sense amplifier suitable for analogue voltage levels |
| 03/30/2004 | US6714448 Method of programming a multi-level memory device |
| 03/30/2004 | US6714447 Semiconductor device and a integrated circuit card |
| 03/30/2004 | US6714446 Magnetoelectronics information device having a compound magnetic free layer |
| 03/30/2004 | US6714445 Three terminal magnetic random access memory |
| 03/30/2004 | US6714444 Magnetic element utilizing spin transfer and an MRAM device using the magnetic element |
| 03/30/2004 | US6714443 Thin film magnetic memory device for writing data of a plurality of bits in parallel |
| 03/30/2004 | US6714442 MRAM architecture with a grounded write bit line and electrically isolated read bit line |
| 03/30/2004 | US6714441 Bridge-type magnetic random access memory (MRAM) latch |
| 03/30/2004 | US6714440 Memory architecture with write circuitry and method therefor |
| 03/30/2004 | US6714439 Semiconductor memory device |
| 03/30/2004 | US6714438 Semiconductor device with high speed latch operation |
| 03/30/2004 | US6714436 Write operation for capacitorless RAM |
| 03/30/2004 | US6714435 Ferroelectric transistor for storing two data bits |
| 03/30/2004 | US6714434 Mid-array isolate circuit layout and method |
| 03/30/2004 | US6714390 Giant magneto-resistive effect element, magneto-resistive effect type head, thin-film magnetic memory and thin-film magnetic sensor |
| 03/30/2004 | US6714047 Semiconductor integrated circuit |
| 03/30/2004 | US6713830 Magnetoresistive element, memory element using the magnetoresistive element, and recording/reproduction method for the memory element |
| 03/30/2004 | US6713802 Magnetic tunnel junction patterning using SiC or SiN |
| 03/30/2004 | US6713791 T-RAM array having a planar cell structure and method for fabricating the same |
| 03/30/2004 | US6713345 Semiconductor memory device having a trench and a gate electrode vertically formed on a wall of the trench |
| 03/30/2004 | US6713340 Method for fabricating a memory device |
| 03/30/2004 | US6712453 Ink jet nozzle rim |
| 03/30/2004 | CA2266062C Dynamic content addressable memory cell |
| 03/25/2004 | WO2004025661A2 Static random access memory with symmetric leakage-compensated bit line |
| 03/25/2004 | WO2004025659A1 Programming a phase-change material memory |
| 03/25/2004 | WO2004025658A1 A method for operating a ferroelectric or electret memory device, and a device of this kind |
| 03/25/2004 | WO2004025657A1 System for controlling mode changes in a voltage down-converter |
| 03/25/2004 | WO2004003926A3 Low-cost, serially-connected, multi-level mask-programmable read-only memory |
| 03/25/2004 | WO2003075634A3 Asymmetric dot shape for increasing select-unselect margin in mram devices |
| 03/25/2004 | WO2003063169B1 Magnetoresistive memory devices and assemblies; and methods of storing and retrieving information |
| 03/25/2004 | US20040057372 Channeled dielectric re-recordable data storage medium |
| 03/25/2004 | US20040057355 Variable level memory |
| 03/25/2004 | US20040057330 Circuit topology for clock signal distribution topology |
| 03/25/2004 | US20040057329 Semiconductor memory device |
| 03/25/2004 | US20040057322 Data output circuit in combined SDR/DDR semiconductor memory device |
| 03/25/2004 | US20040057319 Ferroelectric transistor for storing two data bits |
| 03/25/2004 | US20040057318 Non-volatile memory and method with reduced bit line crosstalk errors |
| 03/25/2004 | US20040057315 Refresh control circuit for ICs with a memory array |
| 03/25/2004 | US20040057312 Method for operating an IC with a memory array |
| 03/25/2004 | US20040057311 Semiconductor integrated circuit |
| 03/25/2004 | US20040057310 Non-volatile semiconductor memory |
| 03/25/2004 | US20040057308 Semiconductor storage device |
| 03/25/2004 | US20040057305 Semiconductor device using high-speed sense amplifier |
| 03/25/2004 | US20040057303 Method and article for concentrating fields at sense |
| 03/25/2004 | US20040057300 Structure of power supply path utilized in design of integrated circuit |
| 03/25/2004 | US20040057295 Magnetic storage element, production method and driving method therefor, and memory array |
| 03/25/2004 | US20040057289 System and method for monitoring internal voltages on an integrated circuit |
| 03/25/2004 | US20040057287 Non-volatile memory and method with reduced source line bias errors |
| 03/25/2004 | US20040057285 Non-volatile memory and method with reduced neighboring field errors |
| 03/25/2004 | US20040057281 Thin film magnetic memory device storing program information efficiently and stably |
| 03/25/2004 | US20040057280 Current drive circuit avoiding effect of voltage drop caused by load and semiconductor memory device equipped therewith |
| 03/25/2004 | US20040057278 Magnetic random access memory |
| 03/25/2004 | US20040057277 Magnetic random access memory |
| 03/25/2004 | US20040057276 Stacked columnar 1T-nMTJ MRAM structure and its method of formation and operation |
| 03/25/2004 | US20040057275 Sensing of memory integrated circuits |
| 03/25/2004 | US20040057274 Ferroelectric transistor for storing two data bits |
| 03/25/2004 | US20040057273 Historical information storage for integrated circuits |
| 03/25/2004 | US20040057267 Semiconductor memory device, and method of controlling the same |
| 03/25/2004 | US20040057263 Local thermal enhancement of magnetic memory cell during programming |
| 03/25/2004 | US20040057180 Method of data storage using only amorphous phase of electrically programmable phase-change memory element |
| 03/25/2004 | US20040056959 Camera control print medium |
| 03/25/2004 | US20040056697 DQS postamble noise suppression by forcing a minimum pulse length |
| 03/25/2004 | US20040056682 Semiconductor integrated circuit |
| 03/25/2004 | US20040056681 SSTL voltage translator with dynamic biasing |
| 03/25/2004 | US20040056308 Semiconductor device and manufacturing method therefor |
| 03/25/2004 | US20040056291 Semiconductor memory device |
| 03/25/2004 | US20040056288 Magnetic memory device and method of manufacturing the same |
| 03/25/2004 | US20040056286 Memory architecture with memory cell groups |
| 03/25/2004 | US20040056278 Soft error resistant semiconductor memory device |
| 03/25/2004 | US20040056105 Data structure encoded on a surface of an object |
| 03/25/2004 | DE10334531A1 Speichermodul und Speichersystem, geeignet für einen Hochgeschwindigkeitsbetrieb Memory module and storage system suitable for a high speed operation |
| 03/25/2004 | DE10332186A1 Integrated circuit dynamic RAM device has PMOS transistors whose electrical resistances are varied in response to voltage levels of respective data lines |
| 03/25/2004 | CA2498608A1 System for controlling mode changes in a voltage down-converter |
| 03/25/2004 | CA2496670A1 A method for operating a ferroelectric or electret memory device, and a device of this kind |
| 03/24/2004 | EP1400979A2 Channeled dielectric re-recordable data storage medium |
| 03/24/2004 | EP1400978A2 Semiconductor memory and method for controlling the same |
| 03/24/2004 | EP1399973A2 Transistor-arrangement, method for operating a transistor-arrangement as a data storage element and method for producing a transistor-arrangement |
| 03/24/2004 | EP1399827A1 System and method for delaying a strobe signal |
| 03/24/2004 | EP0997033A4 A replenishable one time use camera system |
| 03/24/2004 | CN1484834A MRAM write apparatus and method |