Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
03/2004
03/17/2004EP1398789A2 Magnetic random access memory with soft magnetic reference layers
03/17/2004EP1398788A2 Magnetoresistiv data storage device
03/17/2004EP1398787A1 Memory device having memory cell units each composed of a memory and complementary memory cell and reading method
03/17/2004EP1398785A2 Semiconductor memory
03/17/2004EP1397809A1 A memory device with a self-assembled polymer film and method of making the same
03/17/2004EP1177558B1 Ampic dram
03/17/2004EP0976226B1 Integrated multiport switch having shared media access control circuitry
03/17/2004CN1483222A Reluctance storage element
03/17/2004CN1482683A Semiconductor memory device, method for fabricating the same, and method for driving the same
03/17/2004CN1482682A Memory cell and memory device
03/17/2004CN1482671A Method of forming ferroelectric memory cell
03/17/2004CN1482619A System and method for using dynamic random access memory and flash memory
03/17/2004CN1482617A 磁随机存取存储器 Magnetic random access memory
03/17/2004CN1482616A Thin film magnetic memory device suppressing resistance of transistors present in current path
03/16/2004US6708264 Synchronous memory device with prefetch address counter
03/16/2004US6708263 Data transfer memory having the function of transferring data on a system bus
03/16/2004US6708262 Memory device command signal generator
03/16/2004US6708255 Variable input/output control device in synchronous semiconductor device
03/16/2004US6708249 Semiconductor integrated circuit and data processing system
03/16/2004US6707758 Semiconductor memory device including clock generation circuit
03/16/2004US6707751 Semiconductor integrated circuit device
03/16/2004US6707750 Semiconductor storing device for reading out or writing data from/in memory cells
03/16/2004US6707745 Operation control according to temperature variation in integrated circuit
03/16/2004US6707744 Apparatus for controlling refresh of memory device without external refresh command and method thereof
03/16/2004US6707743 Method and apparatus for completely hiding refresh operations in a DRAM device using multiple clock division
03/16/2004US6707740 Semiconductor memory
03/16/2004US6707739 Two-phase pre-charge circuit and standby current erasure circuit thereof
03/16/2004US6707738 Semiconductor memory device having mesh-type structure of precharge voltage line
03/16/2004US6707737 Memory system capable of switching between a reference voltage for normal operation and a reference voltage for burn-in test
03/16/2004US6707735 Semiconductor memory device
03/16/2004US6707730 Semiconductor memory device with efficient and reliable redundancy processing
03/16/2004US6707729 Physically alternating sense amplifier activation
03/16/2004US6707728 Signal delay control circuit in a semiconductor memory device
03/16/2004US6707727 Timing signal generator for correctly transmitting a signal at high speed without waveform distortion
03/16/2004US6707726 Register without restriction of number of mounted memory devices and memory module having the same
03/16/2004US6707723 Data input circuits and methods of inputting data for a synchronous semiconductor memory device
03/16/2004US6707722 Method and apparatus for regulating predriver for output buffer
03/16/2004US6707721 Low power memory design with asymmetric bit line driver
03/16/2004US6707719 Nonvolatile semiconductor memory device with double data storage circuit for writing and write-verifying multi-state memory cells
03/16/2004US6707713 Interlaced multi-level memory
03/16/2004US6707712 Method for reading a structural phase-change memory
03/16/2004US6707711 Magnetic memory with reduced write current
03/16/2004US6707710 Magnetic memory device with larger reference cell
03/16/2004US6707709 Three transistor SRAM
03/16/2004US6707708 Static random access memory with symmetric leakage-compensated bit line
03/16/2004US6707707 SRAM power-up system and method
03/16/2004US6707705 Integrated dynamic memory device and method for operating an integrated dynamic memory
03/16/2004US6707704 Semiconductor memory device and drive method therefor
03/16/2004US6707703 Negative voltage generating circuit
03/16/2004US6707701 Semiconductor memory and its driving method
03/16/2004US6707700 Nonovolatile ferroelectric memory device and driving method thereof
03/16/2004US6707699 Historical information storage for integrated circuits
03/16/2004US6707648 Magnetic device, magnetic head and magnetic adjustment method
03/16/2004US6707334 Semiconductor integrated circuit
03/16/2004US6707321 Input receiver for controlling offset voltage using output feedback signal
03/16/2004US6707139 Semiconductor device with plural unit regions in which one or more MOSFETs are formed
03/16/2004US6707098 Device having electrically conductive first nanowire with applied layer system, second nanowire applied on layers; nanowires arranged skew with respect to one another; layers configured to store charge carriers generated by nanowires
03/16/2004US6707085 Magnetic random access memory
03/16/2004US6707084 Antiferromagnetically stabilized pseudo spin valve for memory applications
03/16/2004US6707083 Magnetic tunneling junction with improved power consumption
03/16/2004US6706639 Method for interconnecting magnetoresistive memory bits
03/11/2004WO2004021573A1 Synchronous mirror delay (smd) circuit and method including a ring oscillator for timing coarse and fine delay intervals
03/11/2004WO2004021372A1 Amorphous alloys for magnetic devices
03/11/2004WO2004021359A2 Software refreshed memory device and method
03/11/2004WO2004021357A1 Magnetic random access memory having a vertical write line
03/11/2004WO2004021356A2 Reconfigurable electronic device having interconnected data storage devices
03/11/2004WO2004021354A1 Bias sensing in dram sense amplifiers
03/11/2004WO2004021353A1 Device writing to a plurality of rows in a memory matrix simultaneously
03/11/2004WO2004021352A1 Method and apparatus for setting and compensating read latency in a high speed dram
03/11/2004WO2004021351A1 Method for reducing power consumption in a state retaining circuit, state retaining circuit and electronic device
03/11/2004WO2004020683A2 Silver selenide film stoichiometry and morphology control in sputter deposition
03/11/2004WO2003103050A3 Variable capacitances for memory cells within a cell group
03/11/2004WO2003094170A3 Layout for thermally selected cross-point mram cell
03/11/2004US20040049629 System and method for using dynamic random access memory and flash memory
03/11/2004US20040048431 Suppression of cross diffusion and gate depletion
03/11/2004US20040047230 Address selection circuit and semiconductor memory device with synchronous and asynchronous address signal paths
03/11/2004US20040047229 Semiconductor memory device having a hierarchical I/O structure
03/11/2004US20040047228 Asynchronous hidden refresh of semiconductor memory
03/11/2004US20040047227 Integrated memory and method for setting the latency in the integrated memory
03/11/2004US20040047225 Semiconductor device having shared sense amplifier configuration
03/11/2004US20040047221 Semiconductor memory device requiring refresh operation
03/11/2004US20040047220 Semiconductor memory device allowing reduction of I/O terminals
03/11/2004US20040047219 Ferroelectric nonvolatile semiconductor memory
03/11/2004US20040047218 Semiconductor memory cell and memory array using a breakdown phenomena in an ultra-thin dielectric
03/11/2004US20040047216 Non-volatile memory device capable of generating accurate reference current for determination
03/11/2004US20040047215 Bit line sense amplifier driving control circuits and methods for synchronous drams that selectively supply and suspend supply of operating voltages
03/11/2004US20040047213 Shared global word line magnetic random access memory
03/11/2004US20040047212 Ferroelectric memory input/output apparatus
03/11/2004US20040047207 Reading circuit, reference circuit, and semiconductor memory device
03/11/2004US20040047206 Semiconductor memory device
03/11/2004US20040047205 DRAM with refresh control function
03/11/2004US20040047204 High density magnetic random access memory
03/11/2004US20040047200 Compact and highly efficient DRAM cell
03/11/2004US20040047199 Semiconductor memory device using magneto resistive element and method of manufacturing the same
03/11/2004US20040047197 Memory device in which memory cells having complementary data are arranged
03/11/2004US20040047196 Thin film magnetic memory device having a highly integrated memory array
03/11/2004US20040047195 Novel multi-state memory
03/11/2004US20040047193 Nonvolatile ferroelectric memory device
03/11/2004US20040047190 Magnetoresistance storage element
03/11/2004US20040047189 High speed and high precision sensing for digital multilevel non-volatile memory system