Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
02/2004
02/18/2004CN1476020A Dynamic random access memory and method used for single level readout
02/18/2004CN1476019A Magnetic storage device with magnetic yoke layer and its mfg. method
02/18/2004CN1476018A Data output circuit used for synchronous integrated circuit storage device
02/18/2004CN1139074C Decoder element for producing output signal with three different potentials, decoder set and decoder circuit
02/18/2004CN1139016C Clock latency compensation circuit for DDR timing
02/17/2004US6694422 Semiconductor memory device having adjustable page length and page depth
02/17/2004US6694416 Double data rate scheme for data output
02/17/2004US6693844 Sending signal through integrated circuit during setup time
02/17/2004US6693840 Non-volatile semiconductor memory device with enhanced erase/write cycle endurance
02/17/2004US6693838 Semiconductor memory device equipped with refresh timing signal generator
02/17/2004US6693837 System and method for quick self-refresh exit with transitional refresh
02/17/2004US6693836 Memory device and method having data path with multiple prefetch I/O configurations
02/17/2004US6693835 TRCD margin
02/17/2004US6693832 Register circuit of extended mode register set
02/17/2004US6693826 Magnetic memory sensing method and apparatus
02/17/2004US6693825 Magneto-resistive device including clad conductor
02/17/2004US6693824 Circuit and method of writing a toggle memory
02/17/2004US6693823 Minimization of metal migration in magnetic random access memory
02/17/2004US6693822 Magnetic random access memory
02/17/2004US6693821 Low cross-talk electrically programmable resistance cross point memory
02/17/2004US6693820 Soft error resistant semiconductor memory device
02/17/2004US6693360 Static type semiconductor memory device
02/17/2004US6692898 Self-aligned conductive line for cross-point magnetic memory integrated circuits
02/12/2004WO2004013919A1 Magnetoresistance effect element and magnetic memory unit
02/12/2004WO2004013863A1 Method of establishing reference levels for sensing multilevel memory cell states
02/12/2004WO2004013862A2 Refreshing memory cells of a phase change material memory device
02/12/2004WO2004013861A2 Magnetic element utilizing spin transfer and an mram device using the magnetic element
02/12/2004WO2003090231A3 Method of performing access to a single-port memory device, memory access device, integrated circuit device and method of use of an integrated circuit device
02/12/2004WO2003085674A3 Synthetic-ferrimagnet sense-layer for high density mram applications
02/12/2004WO2003049119A3 Cascode sense amp and column select circuit and method of operation
02/12/2004US20040030972 Semiconductor memory device having time reduced in testing of memory cell data reading or writing, or testing of sense amplifier performance
02/12/2004US20040029331 Conductive structure for microelectronic devices and methods of fabricating such structures
02/12/2004US20040027975 Circuit and method for writing and reading data from a dynamic memory circuit
02/12/2004US20040027910 Method of generating initializing signal in semiconductor memory device
02/12/2004US20040027908 Nonvolatile memory device suitable for cache memory
02/12/2004US20040027907 Semiconductor memory device operating with low current consumption
02/12/2004US20040027906 Semiconductor memory device capable of stable operation
02/12/2004US20040027904 Reading circuit and semiconductor memory device including the same
02/12/2004US20040027902 Semiconductor device with reduced current consumption in standby state
02/12/2004US20040027900 Semiconductor memory device and system outputting refresh flag
02/12/2004US20040027899 Magnetic logic elements
02/12/2004US20040027897 Bit line pre-charge circuit of semiconductor memory device
02/12/2004US20040027896 Semiconductor memory device
02/12/2004US20040027895 Semiconductor memory device and method for testing semiconductor memory device
02/12/2004US20040027893 Semiconductor device and method for controlling semiconductor device
02/12/2004US20040027892 Semiconductor memory device with offset-compensated sensing scheme
02/12/2004US20040027888 Semiconductor memory device and method for controlling semiconductor memory device
02/12/2004US20040027882 Semiconductor memory device and control method therefor
02/12/2004US20040027880 Memory circuit with redundant memory cell array allowing simplified shipment tests and reduced power consumptions
02/12/2004US20040027876 Semiconductor memory device and refresh control circuit
02/12/2004US20040027874 Offset compensated sensing for magnetic random access memory
02/12/2004US20040027873 Ferrodielectric non-volatile semiconductor memory
02/12/2004US20040027871 Programming and erasing methods for a reference cell of an NROM array
02/12/2004US20040027862 Input buffer circuit of a synchronous semiconductor memory device
02/12/2004US20040027861 Method of manufacturing split gate flash memory device
02/12/2004US20040027854 Magnetic random access memory
02/12/2004US20040027853 Magnetic element utilizing spin transfer and an mram device using the magnetic element
02/12/2004US20040027852 Static type semiconductor memory device with dummy memory cell
02/12/2004US20040027851 Memory cell and circuit with multiple bit lines
02/12/2004US20040027850 Nonvolatile ferroelectric memory device with split word lines
02/12/2004US20040027849 Organic bistable device and organic memory cells
02/12/2004US20040027848 6F2 architecture ROM embedded dram
02/12/2004US20040027844 Process flow for building MRAM structures
02/12/2004US20040027179 Dual mode data output buffers and methods of operating the same
02/12/2004US20040026729 Memory device
02/12/2004US20040026725 Single transistor ferroelectric memory cell, device and method for the formation of the same incorporating a high temperature ferroelectric gate dielectric
02/12/2004US20040026714 Memory device with active passive layers
02/12/2004US20040026697 Four terminal memory cell, a two-transistor SRAM cell, a SRAM array, a computer system, a process for forming a SRAM cell, a process for turning a SRAM cell off, a process for writing a SRAM cell and a process for reading data from a SRAM cell
02/12/2004DE19756929B4 Zellenarray und Leseverstärkerstruktur mit verbesserten Rauscheigenschaften und verringerter Größe Cell array and sense amplifier structure with improved noise characteristics and reduced size
02/12/2004DE10335012A1 Halbleiterspeicherbauelement mit mehreren Speicherfeldern und zugehöriges Datenverarbeitungsverfahren A semiconductor memory device having a plurality of memory arrays and associated data processing method
02/12/2004DE10307272A1 Speichervorrichtung zur Aktivierung einer Zelle durch Spezifizieren eines Blocks und einer Speicherzelle in dem Block Memory device for activation of a cell by specifying a block and a memory cell in the block
02/12/2004DE10240345B3 Read-out circuit for dynamic memory includes circuitry eliminating e.g. manufacturing differences between paired memory cells
02/12/2004DE10226057B3 Integrierte Schaltung mit Spannungsteiler und gepuffertem Kondensator Integrated circuit with a voltage divider and buffered capacitor
02/12/2004DE10154066B4 Integrierter Speicher und Verfahren zum Betrieb eines integrierten Speichers Integrated memory and method of operating an integrated memory
02/12/2004DE10149099B4 Digitale Speicherschaltung mit mehreren Speicherbereichen Digital memory circuit having a plurality of storage areas
02/12/2004DE10010888B4 Schaltungsanordnung und Verfahren zum Bewerten von Kapazitäten in Matrizen Circuit arrangement and method for evaluating capacity-matrices
02/12/2004CA2494075A1 Method of establishing reference levels for sensing multilevel memory cell states
02/11/2004EP1388865A2 Semiconductor memory device and control method therefor
02/11/2004EP1388864A2 Semiconductor memory device and method for controlling semiconductor memory device
02/11/2004EP1204976B1 Method and apparatus for reading a magnetoresistive memory
02/11/2004EP1082764B1 Semiconductor current-switching device having operational enhancer and method therefor
02/11/2004EP0910800B1 A magnetic field sensor and method of manufacturing a magnetic field sensor
02/11/2004CN1475014A Integrated magnetoresistive semiconductor memory system
02/11/2004CN1474456A Non-destructive read-out ferroelectric non-volatile multiple state data storaging mode and its storage unit
02/11/2004CN1474416A Semiconductor storage of shortening detection time
02/11/2004CN1474412A Semiconductor storage device and method of controlling semiconductor storage device
02/11/2004CN1474411A Stable semiconductor storage device with pseudo storage unit
02/11/2004CN1474410A Semiconductor storage capable of stably working
02/11/2004CN1138278C Integrated memory having plate conducting line segment
02/11/2004CN1138276C Sensing state of memory by variable gate voltage
02/10/2004US6691145 Computing circuit, computing apparatus, and semiconductor computing circuit
02/10/2004US6690615 Semiconductor integrated circuit device
02/10/2004US6690614 Semiconductor integrated circuit device
02/10/2004US6690609 Memory device and method having data path with multiple prefetch I/O configurations
02/10/2004US6690608 Semiconductor memory device with internal data reading timing set precisely
02/10/2004US6690606 Asynchronous interface circuit and method for a pseudo-static memory device
02/10/2004US6690605 Logic signal level converter circuit and memory data output buffer using the same
02/10/2004US6690600 Ferroelectric memory device and programming method thereof
02/10/2004US6690599 Ferroelectric memory device
02/10/2004US6690598 Ferroelectric memory device and method of manufacturing the same