Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
11/2003
11/27/2003US20030218486 Digital DLL apparatus for correcting duty cycle and method thereof
11/27/2003US20030218481 Differential current evaluation circuit and sense amplifier circuit for evaluating a memory state of an SRAM semiconductor memory cell
11/27/2003US20030218477 Circuit and method for controlling on-die signal termination
11/27/2003US20030218218 SRAM cell with reduced standby leakage current and method for forming the same
11/27/2003US20030218216 Semiconductor memory module
11/27/2003US20030218198 Silicon on insulator field effect transistor having shared body contact
11/27/2003US20030218197 Magnetic random access memory
11/27/2003US20030218196 Thermally stable ferroelectric memory
11/27/2003US20030218166 Organic field effect transistor
11/27/2003DE10219649C1 Differentielle Strombewerterschaltung und Leseverstärkerschaltung zum Bewerten eines Speicherzustands einer SRAM-Halbleiterspeicherzelle Differential current evaluation circuit and sense amplifier circuit for evaluating a state of a memory SRAM semiconductor memory cell
11/26/2003EP1365417A1 Programming method of the memory cells in a multilevel non-volatile memory device
11/26/2003EP1365416A1 Memory cell isolation
11/26/2003EP1365415A1 MRAM with voltage sources for selected and non-selected word lines and selected and non-selected bit lines
11/26/2003EP1365413A2 Differential current sense amplifier circuit and sense amplifier circuit for evaluating the memory state of a SRAM semiconductor memory cell
11/26/2003EP1364372A1 Non-destructive readout
11/26/2003EP1057185B1 Current sense amplifier
11/26/2003CN1459113A MTJ MRAM parallel-parallel architecture
11/26/2003CN1458662A Panel for cathode ray tube
11/26/2003CN1129143C Semiconductor memory
11/26/2003CN1129142C Semiconductor storage device and its driving method
11/26/2003CN1129073C Dram refresh monitoring and cycle accurate distributed bus arbitration in multi-processing environment
11/25/2003US6654312 Method of forming a low voltage semiconductor storage device and structure therefor
11/25/2003US6654310 Semiconductor memory device with an adaptive output driver
11/25/2003US6654303 Semiconductor memory device, method for controlling same, and electronic information apparatus
11/25/2003US6654302 Semiconductor memory device with a self refresh mode
11/25/2003US6654299 Semiconductor device
11/25/2003US6654297 Device and method for using complementary bits in a memory array
11/25/2003US6654296 Devices, circuits and methods for dual voltage generation using single charge pump
11/25/2003US6654295 Reduced topography DRAM cell fabricated using a modified logic process and method for operating same
11/25/2003US6654280 Memory device with multi-level storage cells
11/25/2003US6654279 Magnetic thin film element, memory element using the same, and method for recording and reproducing using the memory element
11/25/2003US6654278 Magnetoresistance random access memory
11/25/2003US6654277 SRAM with improved noise sensitivity
11/25/2003US6654276 Four-transistor static memory cell array
11/25/2003US6654275 SRAM cell with horizontal merged devices
11/25/2003US6654274 Ferroelectric memory and method for driving the same
11/25/2003US6654273 Shadow ram cell using a ferroelectric capacitor
11/25/2003US6654270 Directional coupling memory module
11/25/2003US6653890 Well bias control circuit
11/25/2003US6653889 Voltage generating circuits and methods including shared capacitors
11/25/2003US6653877 Semiconductor device capable of internally adjusting delayed amount of a clock signal
11/25/2003US6653865 Semiconductor integrated circuit and pulse signal generating method
11/25/2003US6653703 Semiconductor memory device using magneto resistive element and method of manufacturing the same
11/25/2003US6653195 Fabrication of three dimensional container diode for use with multi-state material in a non-volatile memory cell
11/25/2003US6653175 Stability in thyristor-based memory device
11/25/2003US6653174 Thyristor-based device over substrate surface
11/25/2003US6652052 Processing of images for high volume pagewidth printing
11/20/2003WO2003096422A1 Semiconductor storage device
11/20/2003WO2003096354A1 Surface-smoothing conductive layer for semiconductor devices with magnetic material layers
11/20/2003WO2003096352A2 Ferroelectric memory
11/20/2003WO2003096351A2 Memories and memory circuits
11/20/2003WO2003096288A1 System and method of authentifying
11/20/2003WO2003096177A1 Methods of computing with digital multistate phase change materials
11/20/2003WO2003049118A3 Method and architecture for refreshing a 1t memory proportional to temperature
11/20/2003WO2003032392A3 Programmable microelectronic device, structure, and system, and method of forming the same
11/20/2003WO2003025942A3 Magnetic memory with spin-polarized current writing, using amorphous ferromagnetic alloys, writing method for same
11/20/2003WO2003009304A3 Duty-cycle-efficient sram cell test
11/20/2003WO2003007234A3 Information register
11/20/2003WO2002065475A8 Self-aligned conductive line for cross-point magnetic memory integrated circuits
11/20/2003US20030217323 Increasing the effectiveness of error correction codes and operating multi-level memory systems by using information about the quality of the stored data
11/20/2003US20030217243 Memory control chip, control method and control circuit
11/20/2003US20030217225 Semiconductor memory device having external data load signal and serial-to-parallel data prefetch method thereof
11/20/2003US20030217223 Combined command set
11/20/2003US20030214873 Decoding apparatus for semiconductor memory device, and enable method therefore
11/20/2003US20030214871 Semiconductor memory device requiring refresh
11/20/2003US20030214870 Refresh control circuit and method for semiconductor memory device
11/20/2003US20030214869 Systems and methods for communicating with memory blocks
11/20/2003US20030214868 Noise resistant small signal sensing circuit for a memory device
11/20/2003US20030214867 Serially sensing the output of multilevel cell arrays
11/20/2003US20030214866 Semiconductor memory device having direct sense amplifier implemented in hierarchical input/output line architecture
11/20/2003US20030214862 Magnetic random access memory
11/20/2003US20030214859 Integrated circuit memory devices having efficient column select signal generation during normal and refresh modes of operation and methods of operating same
11/20/2003US20030214858 Temperature-dependent refresh cycle for dram
11/20/2003US20030214856 Contact structure, phase change memory cell, and manufacturing method thereof with elimination of double contacts
11/20/2003US20030214851 Standby current erasion circuit of dram
11/20/2003US20030214850 Non-volatile multi-level semiconductor flash memory device and method of driving same
11/20/2003US20030214848 Reduced size multi-port register cell
11/20/2003US20030214847 Wordline pulldown circuit
11/20/2003US20030214840 Computer systems, processes for forming a SRAM cell, processes for turning a SRAM cell off, processes for writing a SRAM cell and processes for reading data from a SRAM cell
11/20/2003US20030214839 Magnetic random access memory
11/20/2003US20030214838 Small area magnetic memory devices
11/20/2003US20030214837 Magnetic random access memory with reduced parasitic currents
11/20/2003US20030214836 Magnetic random access memory cell device using magnetic tunnel junction
11/20/2003US20030214835 Stacked 1t-nmtj mram structure
11/20/2003US20030214834 Device that makes it possible to selectively use nonvolatile memory as RAM or ROM
11/20/2003US20030214833 Sram with improved noise sensitivity
11/20/2003US20030214832 Semiconductor memory device switchable to twin memory cell configuration
11/20/2003US20030214831 Cell array of FeRAM
11/20/2003US20030214830 Enhanced storage states in an memory
11/20/2003US20030214829 Reconfiguring storage modes in a memory
11/20/2003US20030214345 Semiconductor device having internal voltage generated stably
11/20/2003US20030214344 Semiconductor circuit device adaptable to plurality of types of packages
11/20/2003US20030214341 Input receiver for controlling offset voltage using output feedback signal
11/20/2003US20030214339 Timing generation circuit and method for timing generation
11/20/2003US20030213988 Semiconductor memory module
11/20/2003US20030213972 Semiconductor device used in two systems having different power supply voltages
11/20/2003US20030213954 Defective cell remedy method capable of automatically cutting capacitor fuses within the fabrication process
11/19/2003EP1363292A2 Programming method of the memory cells in a multilevel non-volatile memory device
11/19/2003EP1362339A2 Low-power organic light emitting diode pixel circuit
11/19/2003EP0844679B1 Magneto-resistance effect element, magneto-resistance effect type head, memory element, and method for manufacturing them
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