| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
|---|
| 04/01/2004 | WO2004027778A1 Chain memory architecture |
| 04/01/2004 | WO2004027589A2 Clock distribution topology |
| 04/01/2004 | WO2004010435A3 A system, apparatus, and method for a flexible dram architecture |
| 04/01/2004 | WO2003092011A3 Semiconductor memory device and operating method for a semiconductor memory device |
| 04/01/2004 | WO2003065425A3 Emitter and method of making |
| 04/01/2004 | WO2003025780A8 System and method for journal recovery for multinode environments |
| 04/01/2004 | US20040064767 Method of self-repairing dynamic random access memory |
| 04/01/2004 | US20040064644 Structure and method of cache memory data update |
| 04/01/2004 | US20040064606 Memory system allowing fast operation of processor while using flash memory incapable of random access |
| 04/01/2004 | US20040063274 Method of fabricating self-aligned cross-point memory array |
| 04/01/2004 | US20040063271 Synchronous semiconductor device and method of preventing coupling between data buses |
| 04/01/2004 | US20040063223 Spacer integration scheme in MRAM technology |
| 04/01/2004 | US20040062938 Multilayer; reflection layer with fixed magnetism, then storage layer |
| 04/01/2004 | US20040062590 Keyboard with an internal printer |
| 04/01/2004 | US20040062588 Keyboard that incorporates a printing mechanism |
| 04/01/2004 | US20040062137 Method and apparatus for DLL lock latency detection |
| 04/01/2004 | US20040062136 Indication of the system operation frequency to a dram during power-up |
| 04/01/2004 | US20040062129 Method and apparatus for enhancing the efficiency of dynamic RAM |
| 04/01/2004 | US20040062128 Address-counter control system |
| 04/01/2004 | US20040062126 Memory system |
| 04/01/2004 | US20040062125 Magnetic memory element having controlled nucleation site in data layer |
| 04/01/2004 | US20040062122 Method of accessing matrix data with address translation circuit that enables quick serial access in row or column directions |
| 04/01/2004 | US20040062121 Semiconductor memory device having duty cycle correction circuit and interpolation circuit interpolating clock signal in the semiconductor memory device |
| 04/01/2004 | US20040062120 Dram core refresh with reduced spike current |
| 04/01/2004 | US20040062119 Dynamic memory management |
| 04/01/2004 | US20040062117 Adjustable current mode differential amplifier for multiple bias point sensing of MRAM having diode isolation |
| 04/01/2004 | US20040062115 Ferroelectric memory |
| 04/01/2004 | US20040062111 Non-volatile semiconductor memory |
| 04/01/2004 | US20040062107 Methods and apparatus for flexible memory access |
| 04/01/2004 | US20040062101 Semiconductor memory device and method for arranging memory cells |
| 04/01/2004 | US20040062100 Resistive memory element sensing using averaging |
| 04/01/2004 | US20040062097 Magnetic recording medium and magnetic memory apparatus |
| 04/01/2004 | US20040062092 Thin film magnetic memory device having data read current tuning function |
| 04/01/2004 | US20040062090 Synchronous semiconductor memory device of fast random cycle system and test method thereof |
| 04/01/2004 | US20040062088 Semiconductor memory device based on dummy-cell method |
| 04/01/2004 | US20040062087 Memory device having high bus efficiency of network, operating method of the same, and memory system including the same |
| 04/01/2004 | US20040062085 Voltage generation circuitry having temperature compensation |
| 04/01/2004 | US20040062083 Method for defining the initial state of static random access memory |
| 04/01/2004 | US20040062079 Semiconductor memory device using only single-channel transistor to apply voltage to selected word line |
| 04/01/2004 | US20040062077 Nonvolatile semiconductor memory |
| 04/01/2004 | US20040062075 Memory array employing single three-terminal non-volatile storage elements |
| 04/01/2004 | US20040062074 Nonvolatile memory device with configuration switching the number of memory cells used for one-bit data storage |
| 04/01/2004 | US20040062073 Bitline equalization system for a DRAM integrated circuit |
| 04/01/2004 | US20040062072 Nonvolatile semiconductor memory capable of generating read-mode reference current and verify-mode reference current from the same reference cell |
| 04/01/2004 | US20040062071 Ferroelectric memory with wide operating voltage and multi-bit storage per cell |
| 04/01/2004 | US20040062070 Reducing the effect of write disturbs in polymer memories |
| 04/01/2004 | US20040062069 Digit line architecture for dynamic memory |
| 04/01/2004 | US20040061734 Printing device for use with a printing cartridge having capacitive sensor identification |
| 04/01/2004 | US20040061560 Frequency multiplier and method of multiplying frequency of external clock signal, data output buffer, and semiconductor device including the frequency multiplier and the data output |
| 04/01/2004 | US20040061550 Semiconductor device using current mirror circuit |
| 04/01/2004 | US20040061549 Potential detector and semiconductor integrated circuit |
| 04/01/2004 | US20040061166 Magnetoresistive memory device and method for fabricating the same |
| 04/01/2004 | US20040061158 Semiconductor device having different thickness gate oxides |
| 04/01/2004 | US20040061156 Magnetic random access memory having transistor of vertical structure with writing line formed on an upper portion of the magnetic tunnel junction cell |
| 04/01/2004 | US20040061155 Ferroelectric memory with read-only memory cells, and fabrication method thereof |
| 04/01/2004 | US20040061154 Thermally stable magnetic elements utilizing spin transfer and an MRAM device using the magnetic element |
| 04/01/2004 | US20040061153 Non-volatile memory using ferroelectric gate field-effect transistors |
| 04/01/2004 | US20040061144 Semiconductor memory device |
| 04/01/2004 | DE10344020A1 Halbleiterspeicherbaustein mit Bitleitungsspannungsausgleich Semiconductor memory device having Bitleitungsspannungsausgleich |
| 04/01/2004 | DE10260823A1 Integrated random-access memory circuit has data terminals for different regions of each memory bank coupled to common databus via single data line with anti-parallel write-in and read-out amplifiers |
| 04/01/2004 | DE10244401A1 DDR component esp. DDR-DRAM for clocked coordination and commutation of data, comprises first and second clock-pulse relaying devices for differential and single-ended clock signals |
| 04/01/2004 | DE10244400A1 Circuit arrangement with clock-signal detection device e.g. for memory devices such as CMOS type, includes clock signal ascertainment device for detecting whether clock signal is present at terminal |
| 03/31/2004 | EP1403920A2 Method of fabricating self-aligned cross-point memory array |
| 03/31/2004 | EP1403919A2 Magnetic memory device and method of manufacturing the same |
| 03/31/2004 | EP1403877A1 Nonvolatile semiconductor memory |
| 03/31/2004 | EP1403876A1 Ferroelectric memory with wide operating voltage and multi-bit storage per cell |
| 03/31/2004 | EP1403875A2 Magnetoresistive element and magnetic memory allowing high density |
| 03/31/2004 | EP1403874A1 Memory device |
| 03/31/2004 | EP1402536A1 Charge coupled eeprom device and corresponding method of operation |
| 03/31/2004 | EP1402533A2 Molecular electronics arrangement and method for producing a molecular electronics arrangement |
| 03/31/2004 | EP1402532A2 Sense amplifier with improved latching |
| 03/31/2004 | EP1402531A2 Dram with bit line precharging, inverted data writing, retained data output and reduced power consumption |
| 03/31/2004 | EP1402329A2 Low latency multi-level communication interface |
| 03/31/2004 | EP0960421B1 Bitline load and precharge structure for an sram memory |
| 03/31/2004 | EP0846343B1 Electrically erasable memory elements characterized by reduced current and improved thermal stability |
| 03/31/2004 | CN1486533A Magnetic logic elements |
| 03/31/2004 | CN1485926A Sram formed on soi substrate |
| 03/31/2004 | CN1485922A Dynamic RAM |
| 03/31/2004 | CN1485859A Static semiconductor memory device and method of controlling the same |
| 03/31/2004 | CN1485858A Device and method for selecting power down exit |
| 03/31/2004 | CN1485857A Prevention method of encrypted integrated circuit against electrical source attack |
| 03/31/2004 | CN1485856A Semiconductor storage device |
| 03/31/2004 | CN1485855A 定时调整电路和半导体存储装置 Timing adjusting circuit and a semiconductor memory device |
| 03/31/2004 | CN1485854A Reluctance type random access memory circuit |
| 03/31/2004 | CN1485853A Programming Method and programming circuit of reluctance type RAM element |
| 03/31/2004 | CN1485852A 半导体存储器 Semiconductor memory |
| 03/31/2004 | CN1144367C Synchronous delay circuit |
| 03/31/2004 | CN1144294C Semiconductor memory device |
| 03/31/2004 | CN1144229C Semiconductor integrated circuit device |
| 03/31/2004 | CN1144228C Semiconductor integrated circuit device |
| 03/31/2004 | CN1144227C Semiconductor memory of layer position line structure with improved position line pre-charging system |
| 03/31/2004 | CN1144226C Readout amplifier circuit |
| 03/31/2004 | CN1144159C Storage appts. and writing and/or reading methods for use in hierarchical coding |
| 03/31/2004 | CN1144129C Semiconductor circuit |
| 03/31/2004 | CN1144117C Method and circuit for controlling clock signal |
| 03/30/2004 | US6715115 Semiconductor integrated circuit device capable of outputting leading data of a series of multiple burst-readout data without delay |
| 03/30/2004 | US6715096 Interface circuit device for performing data sampling at optimum strobe timing by using stored data window information to determine the strobe timing |
| 03/30/2004 | US6715020 Synchronous integrated circuit device |
| 03/30/2004 | US6714954 Methods of factoring and modular arithmetic |
| 03/30/2004 | US6714479 Semiconductor memory and control method |