Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
03/2004
03/24/2004CN1484820A Display memory driver circuit display and cellular information apparatus
03/24/2004CN1484314A 半导体存储器 Semiconductor memory
03/24/2004CN1484248A Reading circuit and semiconductor memory device including same
03/24/2004CN1484246A IC memory device containing active load circuit and relative method thereof
03/24/2004CN1484245A Semiconductor IC device
03/24/2004CN1143435C Improved delay lockloop
03/24/2004CN1143321C Decision method for semiconductor integrated circuit whether on not qualified and semiconductor integrated circuit
03/24/2004CN1143320C Synchronous semiconductor storage device
03/24/2004CN1143318C Semiconductor storage with auxiliary storage
03/24/2004CN1143317C Semiconductor memory device having test mode
03/24/2004CN1143316C Ferroelectric storage assembly
03/23/2004US6711648 Methods and apparatus for increasing data bandwidth in a dynamic memory device by generating a delayed address transition detection signal in response to a column address strobe signal
03/23/2004US6711093 Reducing digit equilibrate current during self-refresh mode
03/23/2004US6711091 Indication of the system operation frequency to a DRAM during power-up
03/23/2004US6711090 Semiconductor storage unit
03/23/2004US6711086 Multiport semiconductor memory with different current-carrying capability between read ports and write ports
03/23/2004US6711085 Digital memory circuit having a plurality of segmented memory areas
03/23/2004US6711084 Semiconductor device capable of reliable power-on reset
03/23/2004US6711083 High speed DRAM architecture with uniform access latency
03/23/2004US6711082 Method and implementation of an on-chip self refresh feature
03/23/2004US6711081 Refreshing of multi-port memory in integrated circuits
03/23/2004US6711079 Data bus sense amplifier circuit
03/23/2004US6711078 Writeback and refresh circuitry for direct sensed DRAM macro
03/23/2004US6711073 Active termination circuit and method for controlling the impedance of external integrated circuit terminals
03/23/2004US6711072 Digital memory circuit having a plurality of memory areas
03/23/2004US6711071 Semiconductor device
03/23/2004US6711070 Semiconductor memory device operating in synchronization with clock signal
03/23/2004US6711069 Register having a ferromagnetic memory cells
03/23/2004US6711068 Balanced load memory and method of operation
03/23/2004US6711054 Semiconductor device, data processing system and a method for changing threshold of a non-volatile memory cell
03/23/2004US6711053 Scaleable high performance magnetic random access memory cell and array
03/23/2004US6711052 Memory having a precharge circuit and method therefor
03/23/2004US6711051 Static RAM architecture with bit line partitioning
03/23/2004US6711050 Semiconductor memory
03/23/2004US6711049 One transistor cell FeRAM memory array
03/23/2004US6711048 2-port memory device
03/23/2004US6711046 Programmable optical array
03/23/2004US6711042 Semiconductor device whereon memory chip and logic chip are mounted, making testing of memory chip possible
03/23/2004US6710631 256 Meg dynamic random access memory
03/23/2004US6710630 256 Meg dynamic random access memory
03/23/2004US6710422 Semiconductor device and method of manufacturing the same
03/23/2004US6710412 Static semiconductor memory device
03/23/2004US6710392 Semiconductor memory device with increased capacitance and reduced performance fluctuation
03/23/2004US6710388 Ferroelectric transistor, use thereof in a memory cell configuration and method of producing the ferroelectric transistor
03/23/2004US6709942 Method of fabricating magnetic yoke structures in MRAM devices
03/18/2004WO2004023489A1 Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells
03/18/2004WO2004023488A1 Reference voltage generation for memory circuits
03/18/2004WO2004023262A2 One button external backup
03/18/2004WO2004013862A3 Refreshing memory cells of a phase change material memory device
03/18/2004US20040054977 Delay model circuit for use in delay locked loop
03/18/2004US20040054845 Method and apparatus for signaling between devices of a memory system
03/18/2004US20040053510 System for and method of unlimited voltage multi ported sram cells
03/18/2004US20040052153 Self-timed strobe generator and method for use with multi-strobe random access memories to increase memory bandwidth
03/18/2004US20040052152 Semiconductor memory device with clock generating circuit
03/18/2004US20040052150 Magnetoresistive memory or sensor devices having improved switching properties and method of fabrication
03/18/2004US20040052146 Memory device having bitline equalizing voltage generator with charge reuse
03/18/2004US20040052142 Semiconductor memory device and method of controlling the same
03/18/2004US20040052141 Sense amplifier with override write circuitry
03/18/2004US20040052140 Integrated circuit memory devices including active load circuits and related methods
03/18/2004US20040052138 Predecode column architecture and method
03/18/2004US20040052137 Multilevel semiconductor memory, write/read method thereto/therefrom and storage medium storing write/read program
03/18/2004US20040052136 Multilevel semiconductor memory, write/read method thereto/therefrom and storage medium storing write/read program
03/18/2004US20040052132 Integrated memory and method for checking the functioning of an integrated memory
03/18/2004US20040052131 Information storage device and manufacturing method thereof
03/18/2004US20040052129 Method, apparatus, and system for high speed data transfer using source synchronous data strobe
03/18/2004US20040052127 Magnetic random access memory and method for manufacturing the same
03/18/2004US20040052126 Method and circuit for determining sense amplifier sensitivity
03/18/2004US20040052123 Semiconductor memory device comprising memory having active restoration function
03/18/2004US20040052122 Semiconductor storage device and method for driving the same
03/18/2004US20040052120 Multilevel semiconductor memory, write/read method thereto/therefrom and storage medium storing write/read program
03/18/2004US20040052118 Programmable circuit and its method of operation
03/18/2004US20040052114 Programming method of nonvolatile semiconductor memory device
03/18/2004US20040052108 Thin film magnetic memory device suppressing resistance of transistors present in current path
03/18/2004US20040052107 Thin film magnetic memory device capable of stably writing/reading data and method of fabricating the same
03/18/2004US20040052106 Semiconductor memory device with latch circuit and two magneto-resistance elements
03/18/2004US20040052105 Bridge-type magnetic random access memory (mram) latch
03/18/2004US20040052104 MRAM parallel conductor orientation for improved write performance
03/18/2004US20040052103 Volatile memory cell reconfigured as a non-volatile memory cell
03/18/2004US20040052102 Semiconductor memory device capable of holding write data for long time
03/18/2004US20040052006 Magnetoresistance element and magnetoresistance storage element and magnetic memory
03/18/2004US20040051753 Method of identifying printing cartridge characteristics with capacitive sensors
03/18/2004US20040051569 Register controlled delay locked loop
03/18/2004US20040051559 Input buffer circuit with constant response speed of output inversion
03/18/2004US20040051557 Input buffer of differential amplification type in semiconductor device
03/18/2004US20040051161 Non-volatile memory and the fabrication method thereof
03/18/2004US20040051149 Multilevel semiconductor memory, write/read method thereto/therefrom and storage medium storing write/read program
03/18/2004US20040051143 SRAM formed on SOI substrate
03/18/2004US20040051121 Data read circuit in a semiconductor device featuring reduced chip area and increased data transfer rate
03/18/2004DE10338986A1 Static random access memory component has load transistor in active region lying at an angle to drive transistor active region
03/18/2004DE10239322A1 Integrated memory such as DRAM has evaluation unit that produces latency signal corresponding to latency value, after receiving column address and latency value
03/18/2004DE10225398B4 Halbleiterspeichervorrichtung mit Speicherzellenarrays, die zum Durchführen eines wahlfreien Zugriffs in der Lage ist A semiconductor memory device comprising memory cell arrays, which is for performing a random access in a position
03/18/2004CA2483738A1 One button external backup
03/17/2004EP1398835A1 Magnetic memory and its drive method, and magnetic memory apparatus comprising it
03/17/2004EP1398796A1 Dedicated redundancy circuits for different operations in a flash memory device and methods of operating the same
03/17/2004EP1398795A2 Magnetic memory cell
03/17/2004EP1398794A2 Data storage device
03/17/2004EP1398793A2 MOS technology fabricated digital integrated circuit
03/17/2004EP1398792A1 Semiconductor storage device
03/17/2004EP1398791A2 Ferroelectric memory and method for driving the same
03/17/2004EP1398790A2 Magnetoresistive effect element, magnetic memory device and method of fabricating the same