| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 04/19/2005 | US6882578 PCRAM rewrite prevention |
| 04/19/2005 | US6882576 Semiconductor memory device |
| 04/19/2005 | US6882567 Parallel programming of multiple-bit-per-cell memory cells on a continuous word line |
| 04/19/2005 | US6882566 Stacked 1T-nMTJ MRAM structure |
| 04/19/2005 | US6882565 MRAM having current peak suppressing circuit |
| 04/19/2005 | US6882564 Magnetic memory device having magnetic circuit and method of manufacture thereof |
| 04/19/2005 | US6882563 Magnetic memory device and method for manufacturing the same |
| 04/19/2005 | US6882561 Semiconductor memory device comprising memory having active restoration function |
| 04/19/2005 | US6882560 Reading ferroelectric memory cells |
| 04/19/2005 | US6882559 Ferroelectric memory supplying predetermined amount of direct-current bias electricity to first and second bit lines upon reading data from memory cell |
| 04/19/2005 | US6882558 Ferroelectric-type nonvolatile semiconductor memory and operation thereof |
| 04/19/2005 | US6882557 Semiconductor memory device |
| 04/19/2005 | US6882555 Bi-directional buffering for memory data lines |
| 04/19/2005 | US6882554 Integrated memory, and a method of operating an integrated memory |
| 04/19/2005 | US6882553 Stacked columnar resistive memory structure and its method of formation and operation |
| 04/19/2005 | US6882193 Voltage detection circuit, power-on/off reset circuit, and semiconductor device |
| 04/19/2005 | US6882001 Electrically-programmable non-volatile memory cell |
| 04/19/2005 | US6881351 Methods for contacting conducting layers overlying magnetoelectronic elements of MRAM devices |
| 04/19/2005 | US6880914 Inkjet pagewidth printer for high volume pagewidth printing |
| 04/14/2005 | WO2005034212A2 6t finfet cmos sram cell with an increased cell ratio |
| 04/14/2005 | WO2005034176A2 Apparatus and method for selectively configuring a memory device using a bi-stable relay |
| 04/14/2005 | WO2005034133A1 Method and apparatus for implicit dram precharge |
| 04/14/2005 | WO2005034132A1 Magnetic field shaping conductor |
| 04/14/2005 | WO2005034131A1 Clock receiver circuit arrangement, especially for semiconductor components |
| 04/14/2005 | WO2005034130A1 Accelerated life test of mram celles |
| 04/14/2005 | WO2005033959A1 Memory buffer device integrating refresh |
| 04/14/2005 | WO2004099107A3 Dna-based memory device and method of reading and writing same |
| 04/14/2005 | WO2004059697A3 Adaptive negative differential resistance device |
| 04/14/2005 | WO2004055918A3 Tamper-resistant packaging and approach |
| 04/14/2005 | WO2004055824A3 Method and device for protection of an mram device against tampering |
| 04/14/2005 | WO2004055823A3 Hardware security device for magnetic memory cells |
| 04/14/2005 | WO2004055822A3 Tamper-resisting packaging |
| 04/14/2005 | US20050080988 Parity-scanning and refresh in dynamic memory devices |
| 04/14/2005 | US20050080983 Method and apparatus for transmitting and storing data |
| 04/14/2005 | US20050080662 Decision HUB business intelligence collaboration |
| 04/14/2005 | US20050078548 Method and memory system in which operating mode is set using address signal |
| 04/14/2005 | US20050078547 Semiconductor memory device |
| 04/14/2005 | US20050078545 Method and circuit for controlling generation of column selection line signal |
| 04/14/2005 | US20050078543 Dual-ported read sram cell with improved soft error immunity |
| 04/14/2005 | US20050078542 Memory device having multiple array structure for increased bandwidth |
| 04/14/2005 | US20050078539 Circuit and method for controlling a clock synchronizing circuit for low power refresh operation |
| 04/14/2005 | US20050078538 Selective address-range refresh |
| 04/14/2005 | US20050078536 Resistive cross point memory |
| 04/14/2005 | US20050078535 Low power consumption semiconductor memory device capable of selectively changing input/output data width and data input/output method |
| 04/14/2005 | US20050078532 Semiconductor memory module |
| 04/14/2005 | US20050078531 Reference current distribution in MRAM devices |
| 04/14/2005 | US20050078529 Programming methods for multi-level flash EEPROMs |
| 04/14/2005 | US20050078528 Group erasing system for flash array with multiple sectors |
| 04/14/2005 | US20050078522 Memory block erasing in a flash memory device |
| 04/14/2005 | US20050078521 Programming methods for multi-level flash EEPROMs |
| 04/14/2005 | US20050078520 Method and device for preserving word line pass bias using ROM in NAND-type flash memory |
| 04/14/2005 | US20050078516 Transmission control system |
| 04/14/2005 | US20050078514 Multiple twin cell non-volatile memory array and logic block structure and method therefor |
| 04/14/2005 | US20050078513 Semiconductor nonvolatile memory device |
| 04/14/2005 | US20050078512 Write current shunting compensation |
| 04/14/2005 | US20050078511 System and method for storing data in an unpatterned, continuous magnetic layer |
| 04/14/2005 | US20050078510 Magnetic random access memory devices including heat generating layers and related methods |
| 04/14/2005 | US20050078509 System and method for reading data stored on a magnetic shift register |
| 04/14/2005 | US20050078508 SRAM array with improved cell stability |
| 04/14/2005 | US20050078507 Ferroelectric memory device, method of driving the same, and driver circuit |
| 04/14/2005 | US20050078506 Posted precharge and multiple open-page ram architecture |
| 04/14/2005 | US20050078505 AC sensing for a resistive memory |
| 04/14/2005 | US20050078504 Plateline driver with RAMP rate control |
| 04/14/2005 | US20050078503 Memory circuit with non-volatile identification memory and associated method |
| 04/14/2005 | US20050078502 Data control device using a nonvolatile ferroelectric memory |
| 04/14/2005 | US20050078501 Method and arrangement for compensation of a magnetic bias field in a storage layer of a magnetoresistive memory cell |
| 04/14/2005 | US20050078499 Nonvolatile semiconductor storage apparatus and readout method |
| 04/14/2005 | US20050078418 Ferromagnetic double tunnel junction element with asymmetric energy band |
| 04/14/2005 | US20050078417 Magnetoresistance effect device, method of manufacturing the same, magnetic memory apparatus, personal digital assistance, and magnetic reproducing head, and magnetic information reproducing apparatus |
| 04/14/2005 | US20050077975 Circuits and methods of temperature compensation for refresh oscillator |
| 04/14/2005 | US20050077916 Programming circuit and method having extended duration programming capabilities |
| 04/14/2005 | US20050077606 Semiconductor arrangement comprising transistors based on organic semiconductors and non-volatile read-writing memory cells |
| 04/14/2005 | US20050077582 Semiconductor integrated circuit device |
| 04/14/2005 | US20050077576 Semiconductor device and semiconductor memory using the same |
| 04/14/2005 | US20050077574 1T/0C RAM cell with a wrapped-around gate device structure |
| 04/14/2005 | US20050077556 Thermally-assisted magnetic memory structures |
| 04/14/2005 | US20050077555 Memory |
| 04/14/2005 | US20050077543 Composite storage circuit and semiconductor device having the same |
| 04/14/2005 | DE19651248B4 Betriebsmodussetzschaltung in einer Halbleitereinrichtung Operation mode setting circuit in a semiconductor device |
| 04/14/2005 | DE10344874B3 Schaltung zur Einstellung einer von mehreren Organisationsformen einer integrierten Schaltung und Verfahren zu ihrem Betrieb Circuit for setting one of several forms of organization of an integrated circuit and method for its operation |
| 04/14/2005 | DE10341188A1 Batterieanordnung und Verfahren zur Steuerung des Ladezustands einer Batterieanordnung Battery assembly and method for controlling the state of charge of a battery assembly |
| 04/14/2005 | DE10330812A1 Halbleiterspeichermodul A semiconductor memory module |
| 04/14/2005 | DE102004029955A1 Magnetic random access memory device for computer, has grid of bit and word line which is increased by inclusion of multiple diodes that reduce leakage currents circulating through non-selected ones of magnetic memory cells |
| 04/14/2005 | DE102004023844A1 Datenspeichervorrichtung und Verfahren zum Lesen von Daten in einer Datenspeichervorrichtung Data storage device and method for reading data in a data storage device |
| 04/14/2005 | DE10132920B4 Speichervorrichtung mit einer Speicherzelle und einer Bewertungsschaltung Memory device having a memory cell and an evaluation circuit |
| 04/14/2005 | DE10110157B4 Halbleitervorrichtung mit verringertem Stromverbrauch im Standby-Zustand Semiconductor device with reduced power consumption in standby mode |
| 04/14/2005 | DE10109318B4 Halbleiterspeichervorrichtung für schnellen Zugriff A semiconductor memory device for fast access |
| 04/13/2005 | EP1523012A1 Nand-type non-volatile memory cell and method for operating same |
| 04/13/2005 | EP1523011A2 Magnetoresistive element, magnetic memory cell, and magnetic memory device |
| 04/13/2005 | EP1522105A1 Floating-gate semiconductor structures |
| 04/13/2005 | EP1522021A1 Dram supporting different burst-length accesses without changing the burst length setting in the mode register |
| 04/13/2005 | EP1336179B1 Integrated magnetoresistive semiconductor memory system |
| 04/13/2005 | EP1272935A4 Unauthorised modification of values stored in flash memory |
| 04/13/2005 | CN1606783A Increased magnetic stability devices suitable for use as sub-micron memories |
| 04/13/2005 | CN1606782A Magneto-electronic component for high density memory |
| 04/13/2005 | CN1606238A Control circuit and reconfigurable logic block |
| 04/13/2005 | CN1606096A Low power consumption static random memory with low level thread amplitude of oscillation |
| 04/13/2005 | CN1606094A Magnetoresistive element, magnetic memory cell, and magnetic memory device |
| 04/13/2005 | CN1606093A Non-volatile memory cell using torque and random access magnetic memory using same |
| 04/13/2005 | CN1606092A Method for intercrossed memory space disposition |