Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
02/2005
02/22/2005US6859406 Dynamic RAM semiconductor memory and method for operating the memory
02/22/2005US6859405 Semiconductor memory device having improved bit line sensing operation and method for driving power in a bit line sense amplifier of the semiconductor memory device
02/22/2005US6859404 Apparatus and method of compensating for phase delay in semiconductor device
02/22/2005US6859403 Semiconductor memory device capable of overcoming refresh disturb
02/22/2005US6859400 Semiconductor memory device
02/22/2005US6859397 Source side self boosting technique for non-volatile memory
02/22/2005US6859390 Phase-change memory element and method of storing data therein
02/22/2005US6859389 Phase change-type memory element and process for producing the same
02/22/2005US6859388 Circuit for write field disturbance cancellation in an MRAM and method of operation
02/22/2005US6859386 Semiconductor memory device with memory cell having low cell ratio
02/22/2005US6859385 Low power SRAM
02/22/2005US6859384 Semiconductor memory device having two-transistor, one-capacitor type memory cells of high data holding characteristic
02/22/2005US6859383 Sensing method and apparatus for resistance memory device
02/22/2005US6859382 Memory array of a non-volatile ram
02/22/2005US6859381 Semiconductor device and method for driving the same
02/22/2005US6859380 Ferroelectric memory and method of operating same
02/22/2005US6859379 Semiconductor memory device and memory system
02/22/2005US6859377 Dynamic associative memory device
02/22/2005US6859088 Ferroelectric element and a ferroelectric gate device using the same
02/22/2005US6859067 Semiconductor apparatus
02/22/2005US6858949 Semiconductor memory device and method for arranging memory cells
02/22/2005US6858916 Semiconductor memory device with series-connected antifuse-components
02/22/2005US6858906 Floating trap non-volatile semiconductor memory devices including high dielectric constant blocking insulating layers
02/22/2005US6858905 Methods of manufacturing low cross-talk electrically programmable resistance cross point memory structures
02/22/2005US6858890 Ferroelectric memory integrated circuit with improved reliability
02/22/2005US6858862 Discrete polymer memory array and method of making same
02/22/2005US6858481 Memory device with active and passive layers
02/22/2005US6858442 Ferroelectric memory integrated circuit with improved reliability
02/22/2005US6857724 Print assembly for a wide format pagewidth printer
02/22/2005US6857719 Printing cartridge with pressure sensor array identification
02/22/2005US6857569 Data storage card having a non-magnetic substrate and data surface region and method for using same
02/17/2005WO2005015635A2 Spin on polymers for organic memory devices
02/17/2005WO2005015566A1 Detecting over programmed memory
02/17/2005WO2005015565A1 Magnetically lined conductors
02/17/2005WO2005015564A1 Non-standard dual in-line memory modules with more than two ranks of memory per module and multiple serial-presence-detect devices to simulate multiple modules
02/17/2005WO2004029973A3 Thermally stable magnetic element utilizing spin transfer and an mram device using the magnetic element
02/17/2005WO2003083874A8 Data storage device
02/17/2005US20050038953 Method of programming/reading multi-level flash memory using sensing circuit
02/17/2005US20050038950 Storage device having a probe and a storage cell with moveable parts
02/17/2005US20050038755 Method and apparatus for reducing optical emissions in an integrated circuit
02/17/2005US20050037581 Multibit ROM cell and method therefor
02/17/2005US20050037546 Method for manufacturing a programmable eraseless memory
02/17/2005US20050036399 Magneto-resistive random access memory and method for manufacturing the same
02/17/2005US20050036394 Semiconductor device having a data latching or storing function
02/17/2005US20050036393 Scalable flash EEPROM memory cell with notched floating gate and graded source region, and method of manufacturing the same
02/17/2005US20050036388 Method and apparatus for increasing data read speed in a semiconductor memory device
02/17/2005US20050036386 Method and apparatus for synchronization of row and column access operations
02/17/2005US20050036385 System for reducing row periphery power consumption in memory devices
02/17/2005US20050036384 Magnetic random access memory
02/17/2005US20050036380 Method and system of adjusting DRAM refresh interval
02/17/2005US20050036379 Single transistor type magnetic random access memory device and method of operating and manufacturing the same
02/17/2005US20050036378 Synchronous semiconductor memory
02/17/2005US20050036377 Semiconductor integrated circuit device
02/17/2005US20050036376 Magnetic random access memory
02/17/2005US20050036371 Semiconductor memory including error correction function
02/17/2005US20050036369 Temperature compensated bit-line precharge
02/17/2005US20050036368 Method for programming programmable eraseless memory
02/17/2005US20050036367 Distributed write data drivers for burst access memories
02/17/2005US20050036365 Nanotube-based switching elements with multiple controls
02/17/2005US20050036363 High performance embedded semiconductor memory devices with multiple dimension first-level bit-lines
02/17/2005US20050036362 Semiconductor memory device having memory cells including ferromagnetic films and control method thereof
02/17/2005US20050036361 Semiconductor memory device with magnetoresistance elements and method of writing data into the same
02/17/2005US20050036360 Apparatus turning on word line decoder by reference bit line equalization
02/17/2005US20050036358 Nonvolatile ferroelectric memory device with split word lines
02/17/2005US20050036355 Semiconductor memory device capable of testing data line redundancy replacement circuit
02/17/2005US20050036354 Magnetic random access memory
02/17/2005US20050036352 Self-heating burn-in
02/17/2005US20050036351 Multi-bit ROM cell, for storing one of N>4 possible states and having bi-directional read, an array of such cells, and a method for making the array
02/17/2005US20050036346 Electronic memory, such as flash EPROM, with bitwise-adjusted writing current or/and voltage
02/17/2005US20050036134 Semiconductor integrated circuit
02/17/2005US20050036001 Actuator for a micro-electromechanical valve assembly
02/17/2005US20050035959 Method and apparatus for independentlyrefreshing memory capacitors
02/17/2005US20050035786 Circuits made from nanotube-based switching elements with multiple controls
02/17/2005US20050035429 Programmable eraseless memory
02/17/2005US20050035414 Multi-bit rom cell with bi-directional read and a method for making thereof
02/17/2005US20050035411 Semiconductor integrated circuit device
02/17/2005US20050035395 Array of multi-bit ROM cells with each cell having bi-directional read and a method for making the array
02/17/2005US20050035386 Magnetic tunnel junction structure having an oxidized buffer layer and method of fabricating the same
02/17/2005US20050035385 Semiconductor memory device
02/17/2005US20050035384 Ferroelectric memory devices having expanded plate lines
02/17/2005US20050035383 Magnetic tunnel junction and memory device including the same
02/17/2005US20050035373 Storage device
02/17/2005US20050035368 RSFQ Batcher-banyan switching network
02/17/2005DE10354818B3 Clock signal input/output device for clock signal correction e.g. for semiconductor memory device, has frequency divider, signal integrator and two signal receiver circuits coupled to signal restoration circuit
02/17/2005DE10332601A1 Schaltung und Verfahren zur Steuerung eines Zugriffs auf einen integrierten Speicher Circuit and method for controlling an access to an integrated memory
02/17/2005DE10332314A1 Halbleiterspeicher mit kurzer effektiver Wortleitungszykluszeit sowie Verfahren zum Lesen von Daten aus einem derartigen Halbleiterspeicher A semiconductor memory having a short effective word line cycle time and method for reading data from such a semiconductor memory
02/17/2005DE10330811A1 Halbleiterspeichrmodul Halbleiterspeichrmodul
02/17/2005DE102004035998A1 Schaltung und Verfahren zur Temperaturdetektion, Halbleiterbaustein und Auffrischsteuerverfahren Circuit and method for temperature detection, semiconductor device and Auffrischsteuerverfahren
02/17/2005DE102004035151A1 Spannungserhöhungsschaltung und -verfahren Voltage step-up circuit and method
02/17/2005DE102004011425A1 Speicherzellenfolgen in einem Widerstands-Kreuzungspunkt-Speicherzellarray Memory cell strings in a resistive cross-point memory cell array
02/17/2005DE102004011419A1 Speicherzellenfolgen in einem Widerstands-Kreuzungspunkt-Speicherzellarray Memory cell strings in a resistive cross-point memory cell array
02/17/2005DE102004011418A1 System und Verfahren zum Lesen einer Speicherzelle System and method for reading a memory cell
02/16/2005EP1507266A1 Semiconductor memory device with magnetoresistance elements and method of writing data into the same
02/16/2005EP1506552A1 Increasing the effectiveness of error correction codes and operating multi-level memory systems by using information about the quality of the stored data
02/16/2005EP1506551A1 Combined memory
02/16/2005EP1068619B1 Semiconductor memory asynchronous pipeline
02/16/2005EP0834134B1 Delay reduction in transfer of buffered data between two mutually asynchronous buses
02/16/2005CN1582481A Electrodes, method and apparatus for memory structure
02/16/2005CN1582480A Control device for reversing the direction of magnetisation without an external magnetic field
02/16/2005CN1581690A Delay circuit and delay sysnchronization loop device