Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
10/2005
10/19/2005CN1684197A Data readout circuit and semiconductor device having the same
10/19/2005CN1684196A Current sense amplifier circuits having a bias voltage node for adjusting input resistance
10/19/2005CN1684195A High voltage generating circuit preserving charge pumping efficiency
10/19/2005CN1224107C Non-volatile storage device
10/19/2005CN1224105C Two-bit ROM unit of nitride and its manufacture and read method
10/19/2005CN1224054C Semiconductor storage apparatus
10/18/2005US6957378 Semiconductor memory device
10/18/2005US6957372 Repair of address-specific leakage
10/18/2005US6957308 DRAM supporting different burst-length accesses without changing the burst length setting in the mode register
10/18/2005US6957158 High density random access memory in an intelligent electric device
10/18/2005US6956785 Method and apparatus for saving current in a memory device
10/18/2005US6956783 Semiconductor memory device including fuse element
10/18/2005US6956782 Selective bank refresh
10/18/2005US6956780 Semiconductor memory device having direct sense amplifier implemented in hierarchical input/output line architecture
10/18/2005US6956779 Multistage autozero sensing for a multilevel non-volatile memory integrated circuit system
10/18/2005US6956777 Semiconductor memory device and control method thereof
10/18/2005US6956768 Method of programming dual cell memory device to store multiple data states per cell
10/18/2005US6956767 Nonvolatile memory device using serial diode cell
10/18/2005US6956766 Magnetic cell and magnetic memory
10/18/2005US6956765 Magneto-resistance effect element, magnetic memory and magnetic head
10/18/2005US6956764 Method of writing to a multi-state magnetic random access memory cell
10/18/2005US6956763 MRAM element and methods for writing the MRAM element
10/18/2005US6956762 Method and system for data communication on a chip
10/18/2005US6956761 Method to manufacture polymer memory with copper ion switching species
10/18/2005US6956760 Ferroelectric random access memory
10/18/2005US6956759 Ferrodielectric non-volatile semiconductor memory
10/18/2005US6956758 Fully-hidden refresh dynamic random access memory
10/18/2005US6956756 Associative memory, method for searching the same, network device, and network system
10/18/2005US6956418 Delay locked loop device
10/18/2005US6956415 Modular DLL architecture for generating multiple timings
10/18/2005US6956397 Temperature adaptive refresh clock generator for refresh operation
10/18/2005US6956280 Integrated circuit apparatus and neuro element
10/18/2005US6956271 Switching of soft reference layers of magnetic memory devices
10/18/2005US6956270 Magnetic memory device having a plurality of magneto-resistance effect elements arranged in a matrix form and method for manufacturing the same
10/18/2005US6956257 Magnetic memory element and memory device including same
10/18/2005US6956256 Vertical gain cell
10/18/2005US6955966 Method of manufacturing non-volatile read only memory
10/18/2005US6955926 Method of fabricating data tracks for use in a magnetic shift register memory device
10/13/2005WO2005096316A1 Operating non-volatile memory without read disturb limitations
10/13/2005WO2005096315A2 Thermally stable reference voltage generator for mram
10/13/2005WO2005096314A1 Semiconductor nonvolatile storage circuit
10/13/2005WO2005096313A2 Separate write and read access architecture for magnetic tunnel junction
10/13/2005WO2005096312A1 Mram based on vertical current writing and its control method
10/13/2005WO2005078733A3 Self-boosting system for flash memory cells
10/13/2005WO2005064357A3 Flux guides for magnetic field sensors and memories
10/13/2005WO2005045935A3 Sidewall formation for high density polymer memory element array
10/13/2005US20050229077 Semiconductor storage device
10/13/2005US20050229076 Semiconductor device and testing method for same
10/13/2005US20050228935 High speed data bus
10/13/2005US20050228611 Self-refresh control circuit
10/13/2005US20050227377 Creation of electron traps in metal nitride and metal oxide electrodes in polymer memory devices
10/13/2005US20050226668 Keyboard for a computer system
10/13/2005US20050226667 Pagewidth printer and computer keyboard combination
10/13/2005US20050226114 Method and apparatus for generating absolute time in pregroove data
10/13/2005US20050226103 Data storage device
10/13/2005US20050226091 Semiconductor memory device including internal clock doubler
10/13/2005US20050226090 Pseudo SRAM having combined synchronous and asynchronous mode register set
10/13/2005US20050226089 Memory chip architecture having non-rectangular memory banks and method for arranging memory banks
10/13/2005US20050226084 Dual port SRAM cell
10/13/2005US20050226083 Destructive-read random access memory system buffered with destructive-read memory cache
10/13/2005US20050226082 Method of accessing matrix data with address translation circuit that enables quick serial access in row or column directions
10/13/2005US20050226081 Semiconductor memory device
10/13/2005US20050226079 Methods and apparatus for dual port memory devices having hidden refresh and double bandwidth
10/13/2005US20050226077 Static memory cell having independent data holding voltage
10/13/2005US20050226075 Master chip, semiconductor memory, and method for manufacturing semiconductor memory
10/13/2005US20050226074 Row active control circuit of pseudo static random access memory
10/13/2005US20050226073 Semiconductor memory device for performing refresh operation and refresh method thereof
10/13/2005US20050226071 Storage device having parallel connected memory cells that include magnetoresistive elements
10/13/2005US20050226070 Semiconductor memory device
10/13/2005US20050226069 Semiconductor device using high-speed sense amplifier
10/13/2005US20050226068 Multi-layered memory cell structure
10/13/2005US20050226067 Nonvolatile memory cell operating by increasing order in polycrystalline semiconductor material
10/13/2005US20050226064 Magnetic switching with expanded hard-axis magnetization volume at magnetoresistive bit ends
10/13/2005US20050226060 Semiconductor memory device including global IO line with low-amplitude driving voltage signal applied thereto
10/13/2005US20050226058 Data input/output (I/O) apparatus for use in memory device
10/13/2005US20050226054 Integrated code and data flash memory
10/13/2005US20050226053 Semiconductor memory
10/13/2005US20050226052 Novel oxidation structure/method to fabricate a high-performance magnetic tunneling junction mram
10/13/2005US20050226050 Apparatus and method for programming flash memory units using customized parameters
10/13/2005US20050226049 NOR flash memory device and method of shortening a program time
10/13/2005US20050226047 Semiconductor device and method of manufacture thereof
10/13/2005US20050226046 Method and device for performing cache reading
10/13/2005US20050226043 Magnetic tunnel junctions with improved tunneling magneto-resistance
10/13/2005US20050226042 Thin film magnetic memory device for programming required information with an element similar to a memory cell information programming method
10/13/2005US20050226041 Stacked 1T-nmemory cell structure
10/13/2005US20050226040 Magnetic memory cell with shape anisotropy
10/13/2005US20050226039 Magneto-resistive memory cell structures with improved selectivity
10/13/2005US20050226038 Stacked columnar 1T-nMTj MRAM structure and its method of formation and operation
10/13/2005US20050226037 Stacked columnar 1T-nMTJ MRAM structure and its method of formation and operation
10/13/2005US20050226036 Memory device and storage apparatus
10/13/2005US20050226035 Multi-cell resistive memory array architecture with select transistor
10/13/2005US20050226034 Resistance change sensor
10/13/2005US20050226033 Composite storage circuit and semiconductor device having the same composite storage circuit
10/13/2005US20050226032 SRAM device having forward body bias control
10/13/2005US20050226031 Low leakage asymmetric sram cell devices
10/13/2005US20050226030 Magnetic memory device
10/13/2005US20050226029 Programmable microelectronic devices and methods of forming and programming same
10/13/2005US20050226028 Ferroelectric memory
10/13/2005US20050226027 FeRAM capable of restoring "0" data and "1" data at a time
10/13/2005US20050226025 Semiconductor memory device for sensing voltages of bit lines in high speed
1 ... 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 ... 761