Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
10/2005
10/27/2005US20050240838 Semiconductor memory device having code bit cell array
10/27/2005US20050240791 Interleaved delay line for phase locked and delay locked loops
10/27/2005US20050240721 Flash memory management method that is resistant to data corruption by power loss
10/27/2005US20050238128 Duty cycle correction apparatus and method for use in a semiconductor memory device
10/27/2005US20050237850 Method and apparatus for improving stability of a 6T CMOS SRAM cell
10/27/2005US20050237848 Semiconductor memory device and semiconductor device and semiconductor memory device control method
10/27/2005US20050237846 CMOS image sensor having row decoder capable of shutter timing control
10/27/2005US20050237845 Data storage device and method of forming the same
10/27/2005US20050237840 Rewriteable electronic fuses
10/27/2005US20050237839 Semiconductor memory device
10/27/2005US20050237838 Refresh control circuit and method for multi-bank structure DRAM
10/27/2005US20050237837 Memory with adjustable access time
10/27/2005US20050237836 Refresh methods for RAM cells featuring high speed access
10/27/2005US20050237835 Circuit and method for high speed sensing
10/27/2005US20050237827 RAS time control circuit and method for use in DRAM using external clock
10/27/2005US20050237826 Nonvolatile semiconductor memory device
10/27/2005US20050237820 Semiconductor integrated circuit device
10/27/2005US20050237817 Semiconductor memory device with MOS transistors, each having a floating gate and a control gate, and memory card including the same
10/27/2005US20050237816 Operation scheme for spectrum shift in charge trapping non-volatile memory
10/27/2005US20050237814 Non-volatile memory and control with improved partial page program capability
10/27/2005US20050237812 Thin film transistor array panel for a liquid crystal display
10/27/2005US20050237810 Sense amplifier for a non-volatile memory device
10/27/2005US20050237809 Operation scheme with high work function gate and charge balancing for charge trapping non-volatile memory
10/27/2005US20050237808 Semiconductor memory device with MOS transistors, each including floating gate and control gate, and memory card including the same
10/27/2005US20050237805 Semiconductor non-volatile storage device
10/27/2005US20050237803 Nonvolatile memory and method of programming the same memory
10/27/2005US20050237800 Sector protection circuit for non-volatile semiconductor memory, sector protection method and non-volatile semiconductor memory
10/27/2005US20050237796 MRAM element
10/27/2005US20050237795 Two conductor thermally assisted magnetic memory
10/27/2005US20050237794 Thin film magnetic memory device capable of conducting stable data read and write operations
10/27/2005US20050237793 Magnetic random access memory designs with controlled magnetic switching mechanism by magnetostatic coupling
10/27/2005US20050237792 Magnetic memory device structure
10/27/2005US20050237791 Solid-state memory device and method for arrangement of solid-state memory cells
10/27/2005US20050237790 Antiferromagnetically stabilized pseudo spin valve for memory applications
10/27/2005US20050237789 Method and apparatus for testing tunnel magnetoresistive effect element
10/27/2005US20050237788 Magnetic memory and recording method thereof
10/27/2005US20050237787 Spin transfer magnetic elements with spin depolarization layers
10/27/2005US20050237786 Semiconductor memories
10/27/2005US20050237784 Nonvolatile ferroelectric memory device with split word lines
10/27/2005US20050237782 Failure detection circuit
10/27/2005US20050237779 Nonvolatile ferroelectric perpendicular electrode cell, FeRAM having the cell and method for manufacturing the cell
10/27/2005US20050237683 Semiconductor integrated circuit device
10/27/2005US20050237363 Ink ejection devices within an inkjet printer
10/27/2005US20050237362 Inkjet printhead having multiple-sectioned nozzle actuators
10/27/2005US20050237361 Inkjet nozzle comprising a motion-transmitting structure
10/27/2005US20050237120 Phase-locked loop integrated circuits having fast phase locking characteristics
10/27/2005US20050237102 Semiconductor integrated circuit device
10/27/2005US20050237101 Charge pump clock for non-volatile memories
10/27/2005US20050236657 Method of stress-testing an isolation gate in a dynamic random access memory
10/27/2005DE202005011871U1 Ternary erase and read memory based on ternary and quaternary logic has pnp or or dual gate address decoder and four logic values
10/27/2005DE202005011868U1 Master slave flip flop for ternary thrust register based on ternary and quaternary logic has two ternary flip flops connected to inverter and four potential levels and logic numbers
10/27/2005DE202005011864U1 Ternary flip flop pre driver based on ternary and quaternary logic has pnp logic or or dual gate and and p binary and gate and carry signal
10/27/2005DE19903606B4 Halbleiteranordnung Semiconductor device
10/27/2005DE19820040B4 Halbleiterspeichervorrichtung A semiconductor memory device
10/27/2005DE10260770B4 DRAM-Speicher mit vertikal angeordneten Auswahltransistoren und Verfahren zur Herstellung DRAM memory with vertical selection transistors and methods for preparing
10/27/2005DE102005014815A1 Semiconductor memory device e.g. dynamic RAM, data reading method for e.g. PDA, involves concurrently transferring data from pair of buffers to host, and transferring another data from page buffers into another pair of buffers
10/27/2005DE102005009546A1 Ein Widerstandsänderungssensor A change in resistance sensor
10/27/2005DE102004017768B3 Elektrisch programmierbare Speicherzelle und Verfahren zum Programmieren und Auslesen einer solchen Speicherzelle An electrically programmable memory cell and method for programming and reading such a memory cell,
10/27/2005DE102004015928A1 Schreib-/Lösch-Verfahren für resistiv schaltende Speicherbauelemente Write / erase method for resistive switching memory devices
10/27/2005DE10010456B4 Vorrichtung zur Referenzspannungserzeugung bei ferroelektrischen Speichern Device for generating reference voltage in ferroelectric memories
10/27/2005CA2562350A1 Bimodal operation of ferroelectric and electret memory cells and devices
10/26/2005EP1589594A1 Cpp-type giant manetoresistance effect element and magnetic component and magnetic device using it
10/26/2005EP1588379A1 Non-volatile semiconductor memory with large erase blocks storing cycle counts
10/26/2005EP1588373A1 Fast remanent resistive ferroelectric memory
10/26/2005EP1588372A2 Mram architecture with a grounded write bit line and electrically isolated read bit line
10/26/2005EP1588371A2 Tamper-resistant packaging and approach using magnetically-set data
10/26/2005EP1488426B1 Method for producing a reference layer and an mram memory cell provided with said type of reference layer
10/26/2005EP1464057A4 System and method for inhibiting imprinting of capacitor structures of a memory
10/26/2005EP1425754B1 Compensation of a bias magnetic field in a storage surface of a magnetoresistive storage cell
10/26/2005CN1689230A Voltage generating circuit, voltage generating device and semiconductor device using the same, and driving method thereof
10/26/2005CN1689118A Read-only magnetic memory device MROM
10/26/2005CN1689116A Flash memory and memory control method
10/26/2005CN1689114A Semiconductor device
10/26/2005CN1689113A Semiconductor memory
10/26/2005CN1689112A Semiconductor memory
10/26/2005CN1689111A Software refreshed memory device and method
10/26/2005CN1689110A Semiconductor memory
10/26/2005CN1689109A Dual loop sensing scheme for resistive memory elements
10/26/2005CN1689108A Programmable magnetic memory device FP-MRAM
10/26/2005CN1689107A Reference for MRAM cell
10/26/2005CN1689075A Storage system using electromagnetic array
10/26/2005CN1688888A Sense amplifier with configurable voltage swing control
10/26/2005CN1225037C Integrated circuit device
10/26/2005CN1225025C Semiconductor memory
10/26/2005CN1225024C Semiconductor storing device and its driving method
10/26/2005CN1224974C Semiconductor memory having hierarchical bitline architecture with interleaved master bitlines
10/26/2005CN1224897C Methods and apparatus for increasing data bandwidth of dynamic memory device
10/26/2005CN1224895C Method of programmatic quick flashing storage element
10/26/2005CN1224876C Clock synchronous circuit
10/26/2005CN1224874C Register with memory devices installed in unlimited amount and memory module
10/25/2005US6958948 Semiconductor device having a data latching or storing function
10/25/2005US6958945 Device having a memory array storing each bit in multiple memory cells
10/25/2005US6958944 Enhanced refresh circuit and method for reduction of DRAM refresh cycles
10/25/2005US6958939 Flash memory cell having multi-program channels
10/25/2005US6958937 DRAM cells with repressed floating gate memory, low tunnel barrier interpoly insulators
10/25/2005US6958936 Erase inhibit in non-volatile memories
10/25/2005US6958934 Method of programming and erasing multi-level flash memory
10/25/2005US6958933 Memory cell strings
10/25/2005US6958931 Bit line control and sense amplification for TCCT-based memory cells
10/25/2005US6958930 Magnetoelectronic device with variable magnetic write field
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