Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
12/2005
12/08/2005US20050270884 Memory circuit, and method for reading out data contained in the memory circuit using shared command signals
12/08/2005US20050270882 High voltage generators having an integrated discharge path for use in non-volatile semiconductor memory devices
12/08/2005US20050270880 Internal power management scheme for a memory chip in deep power down mode
12/08/2005US20050270877 Storage device and information processing system
12/08/2005US20050270874 Bank based self refresh control apparatus in semiconductor memory device and its method
12/08/2005US20050270864 Memory cell arrangement having dual memory cells
12/08/2005US20050270852 Read latency control circuit
12/08/2005US20050270850 Nonvolatile flash memory and method of operating the same
12/08/2005US20050270847 Battery
12/08/2005US20050270844 Method of programming and erasing multi-level flash memory
12/08/2005US20050270843 Methods of sanitizing a flash-based data storage device
12/08/2005US20050270842 Nonvolatile memory
12/08/2005US20050270841 Method and apparatus for semiconductor device repair with reduced number of programmable elements
12/08/2005US20050270833 Reading circuit for reading a memory cell
12/08/2005US20050270832 High-density phase change cell array and phase change memory device having the same
12/08/2005US20050270831 Magnetic non-volatile memory coil layout architecture and process integration scheme
12/08/2005US20050270830 Integrated circuit structure formed by damascene process
12/08/2005US20050270829 Nonvolatile semiconductor memory device having improved redundancy relieving rate
12/08/2005US20050270828 Magnetic memory device and manufacturing method thereof
12/08/2005US20050270827 Method and apparatus for reading data from a ferromagnetic memory cell
12/08/2005US20050270825 Recording control device and method, program, and recording medium
12/08/2005US20050270824 Nanotube-based switching elements with multiple controls
12/08/2005US20050270823 Standard cell, semiconductor integrated circuit device of standard cell scheme and layout design method for semiconductor integrated circuit device
12/08/2005US20050270822 Processing systems and methods for molecular memory
12/08/2005US20050270821 Semiconductor device and manufacturing method for same
12/08/2005US20050270819 Semiconductor storage device
12/08/2005US20050270334 Ink jet nozzle arrangement having paddle forming a portion of a wall
12/08/2005US20050269646 Memory
12/08/2005US20050269628 Negative differential resistance pull up element for DRAM
12/08/2005US20050269623 Nonvolatile semiconductor memory device and a method of the same
12/08/2005US20050269614 Non-junction-leakage 1T-RAM cell
12/08/2005US20050269612 Solid-state component based on current-induced magnetization reversal
12/08/2005US20050269611 Ferroelectric device and method of manufacturing such a device
12/08/2005US20050269566 Programmable structure, an array including the structure, and methods of forming the same
12/08/2005DE10335618B4 Halbleiterspeicher und Verfahren zum Betreiben eines Halbleiterspeichers A semiconductor memory and method of operating a semiconductor memory
12/08/2005DE102004059410A1 Semiconductor memory device e.g. NAND flash memory device, input/output repair method, involves positioning main and redundancy page buffers in main and redundancy array, respectively
12/08/2005DE102004024552B3 Speicherzellenanordnung mit einer Doppel-Speicherzelle Memory cell arrangement having a double memory cell
12/08/2005DE10004110B4 Verfahren und Schaltungsanordnung zur Lese/Schreibsteuerung eines synchronen Speichers Method and circuit arrangement for read / write control of a synchronous memory
12/07/2005EP1603168A1 Field-effect transistor with spin-dependent transmission characteristic and nonvolatile memory using same
12/07/2005EP1603164A2 Memory device and its manufacturing method
12/07/2005EP1603163A2 Three-dimensional semiconductor device
12/07/2005EP1603136A2 Semiconductor memory device
12/07/2005EP1602108A2 Multi-frequency synchronizing clock signal generator
12/07/2005EP1279180B1 Tunable devices incorporating bicu3 ti3 feo12
12/07/2005EP1196924A4 Method of programming phase-change memory element
12/07/2005CN1706001A Memory device, motion vector detection device, and detection method
12/07/2005CN1705146A Battery
12/07/2005CN1705127A Semiconductor integrated circuit
12/07/2005CN1705038A Bank based self refresh control apparatus in semiconductor memory device and its method
12/07/2005CN1230889C Semiconductor memory with same property storage units and making method thereof
12/07/2005CN1230828C One-shot signal generating circuit
12/06/2005US6973008 Apparatus for flexible deactivation of word lines of dynamic memory modules and method therefor
12/06/2005US6973007 Main row decoder in a semiconductor memory device
12/06/2005US6973006 Predecode column architecture and method
12/06/2005US6973003 Memory device and method
12/06/2005US6973002 Semiconductor integrated circuit comprising sense amplifier activating circuit for activating sense amplifier circuit
12/06/2005US6973000 Synchronous semiconductor memory device of fast random cycle system and test method thereof
12/06/2005US6972999 Semiconductor integrated circuit
12/06/2005US6972998 Double data rate memory devices including clock domain alignment circuits and methods of operation thereof
12/06/2005US6972997 Nonvolatile semiconductor memory device
12/06/2005US6972993 Method and structure for efficient data verification operation for non-volatile memories
12/06/2005US6972992 Tunneling magnetoresistive random access memory with a multilayer fixed layer
12/06/2005US6972991 Thin film magnetic memory device suppressing internal magnetic noises
12/06/2005US6972990 Ferro-electric memory device and method of manufacturing the same
12/06/2005US6972989 Reference current distribution in MRAM devices
12/06/2005US6972988 State save-on-power-down using GMR non-volatile elements
12/06/2005US6972987 Techniques for reducing power consumption in memory cells
12/06/2005US6972986 Combination field programmable gate array allowing dynamic reprogrammability and non-votatile programmability based upon transistor gate oxide breakdown
12/06/2005US6972985 Memory element having islands
12/06/2005US6972984 Ferroelectric memory device
12/06/2005US6972983 Increasing the read signal in ferroelectric memories
12/06/2005US6972981 Semiconductor memory module
12/06/2005US6972980 Semiconductor memory devices and methods of fabricating semiconductor memory device
12/06/2005US6972706 Current folding cell and circuit comprising at least one folding cell
12/06/2005US6972585 Semiconductor integrated circuit device and digital measuring instrument
12/06/2005US6972465 CMOS process compatible, tunable negative differential resistance (NDR) device and method of operating same
12/06/2005US6972430 Sublithographic contact structure, phase change memory cell with optimized heater shape, and manufacturing method thereof
12/06/2005US6972428 Programmable resistance memory element
12/06/2005US6972238 Oxygen content system and method for controlling memory resistance properties
12/06/2005US6972211 Method of fabricating trench isolated cross-point memory array
12/01/2005WO2005114672A1 Method and system for controlling refresh in volatile memories
12/01/2005WO2005114671A1 Digital magnetic current sensor and logic
12/01/2005WO2005106886A3 Refreshing data stored in a flash memory
12/01/2005WO2004100169A3 Mram architecture with a bit line located underneath the magnetic tunneling junction device
12/01/2005US20050268207 Techniques for operating semiconductor devices
12/01/2005US20050268130 Data processor
12/01/2005US20050268066 High speed data bus
12/01/2005US20050268050 Multi-port memory device providing protection signal
12/01/2005US20050268025 Configurable ready/busy control
12/01/2005US20050268024 Memory controller for use in multi-thread pipeline bus system and memory control method
12/01/2005US20050268022 Cache line memory and method therefor
12/01/2005US20050266666 Suppression of cross diffusion and gate depletion
12/01/2005US20050265209 Electroluminescent multilayer optical information storage medium with integrated readout and composition of matter for use therein
12/01/2005US20050265118 Method for controlling time point for data output in synchronous memory device
12/01/2005US20050265116 Semiconductor memory device without decreasing performance thereof even if refresh operation or word line changing operation occur during burst operation
12/01/2005US20050265105 Semiconductor device with self refresh test mode
12/01/2005US20050265104 Method and system for providing independent bank refresh for volatile memories
12/01/2005US20050265103 Method and system for providing seamless self-refresh for directed bank refresh in volatile memories
12/01/2005US20050265102 Method and system for providing directed bank refresh for volatile memories
12/01/2005US20050265098 Serially sensing the output of multilevel cell arrays
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