Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
12/2005
12/01/2005US20050265097 Nonvolatile semiconductor memory device
12/01/2005US20050265096 Semiconductor integrated circuit device
12/01/2005US20050265095 Semiconductor integrated circuit
12/01/2005US20050265092 Nonvolatile semiconductor memory device
12/01/2005US20050265091 Semiconductor memory device
12/01/2005US20050265090 Semiconductor storage device
12/01/2005US20050265088 Semiconductor memory device and operating method of the same
12/01/2005US20050265082 Simultaneous read circuit for multiple memory cells
12/01/2005US20050265080 Semiconductor nonvolatile memory device
12/01/2005US20050265079 Semiconductor memory device
12/01/2005US20050265077 Circuit layout and structure for a non-volatile memory
12/01/2005US20050265074 Compressed file system for non-volatile RAM
12/01/2005US20050265073 Non-volatile memory device capable of changing increment of program voltage according to mode of operation
12/01/2005US20050265072 Indirect switching and sensing of phase change memory cells
12/01/2005US20050265071 Light emitting display, display panel, and driving method thereof
12/01/2005US20050265070 SRAM cell for soft-error rate reduction and cell stability improvement
12/01/2005US20050265069 Merged mos-bipolar capacitor memory cell
12/01/2005US20050265068 Semiconductor memory device
12/01/2005US20050265067 Ferroelectric memory device and method of making the same
12/01/2005US20050265065 Ferroelectric memory
12/01/2005US20050264611 Ink jet printhead nozzle arrangement with actuated nozzle chamber closure
12/01/2005US20050264347 Internal voltage generating circuit and semiconductor integrated circuit device
12/01/2005US20050264331 Methods and apparatus for delay circuit
12/01/2005US20050264325 System and method for open-loop synthesis of output clock signals having a selected phase relative to an input clock signal
12/01/2005US20050264324 SOI sense amplifier with cross-coupled body terminal
12/01/2005US20050264323 SOI sense amplifier with cross-coupled bit line structure
12/01/2005US20050264322 SOI sense amplifier with pre-charge
12/01/2005US20050263811 Semiconductor device
12/01/2005US20050263809 Ferroelectric memory and method of fabricating the same
12/01/2005US20050263400 Method of applying cladding material on conductive lines of MRAM devices
12/01/2005DE102005020797A1 Nichtflüchtiges Speicherbauelement und Programmierverfahren Non-volatile memory device and programming method
12/01/2005DE102005020796A1 Control information e.g. flag, programming method for use in e.g. mobile computer, involves performing lower-speed programming of given cell type in area of memory array, and confirming result of lower-speed programming
12/01/2005DE102004031450A1 Verzögerungsregelkreis-Vorrichtung Delay locked loop device
12/01/2005DE102004022425A1 Integrierte Schaltungsanordnung zur Stabilisierung einer Spannung An integrated circuit device for stabilizing a voltage
12/01/2005DE102004022326A1 Verfahren zum Testen eines integrierten Halbleiterspeichers A method for testing an integrated semiconductor memory,
11/2005
11/30/2005EP1600980A1 Semiconductor memory device without decreasing performance thereof even if refresh operation or word line changing operation occur during burst operation
11/30/2005EP1600979A1 Ferroelectric memory
11/30/2005EP1600978A1 Semiconductor memory device and signal processing system
11/30/2005EP1600977A2 Multi-bit magnetic random acces memory device
11/30/2005EP1599940A1 Integrated digital circuit comprising a non-volatile storage element
11/30/2005EP1599881A1 Nand flash memory avoiding program disturb with a self boosting technique
11/30/2005EP1446807A4 Sense amplifier for multilevel non-volatile integrated memory devices
11/30/2005CN1703759A Semiconductor storage device, test method therefor, and test circuit therefor
11/30/2005CN1703758A Non-volatile memory and method with reduced neighboring field errors
11/30/2005CN1703757A Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells
11/30/2005CN1702869A Semiconductor memory device
11/30/2005CN1702772A SRAM core cell for light-emitting display
11/30/2005CN1702771A Semiconductor memory device and operating method of the same
11/30/2005CN1702770A Semiconductor integrated circuit device
11/30/2005CN1702769A Semiconductor memory device without decreasing performance thereof even if refresh operation or word line changing operation occur during burst operation
11/30/2005CN1702768A Semiconductor storage device
11/30/2005CN1702767A Enhanced refresh circuit and method for reduction of dram refresh cycles
11/30/2005CN1229867C Method for driving semiconductor memory
11/30/2005CN1229807C Memory device with short read-out period
11/30/2005CN1229806C Storage unit read-out based on non-continuous property
11/29/2005US6971051 System and method of recovering from soft memory errors
11/29/2005US6971039 DDR to SDR conversion that decodes read and write accesses and forwards delayed commands to first and second memory modules
11/29/2005US6970395 Memory device and method of reading data from a memory device
11/29/2005US6970393 Pulse generating circuit for self-refresh
11/29/2005US6970391 Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions
11/29/2005US6970390 DRAM memory circuit with sense amplifiers
11/29/2005US6970389 Integrated memory
11/29/2005US6970387 System and method for determining the value of a memory element
11/29/2005US6970383 Methods of redundancy in a floating trap memory element based field programmable gate array
11/29/2005US6970381 Semiconductor memory
11/29/2005US6970379 System and method for storing data in an unpatterned, continuous magnetic layer
11/29/2005US6970378 Thin-film magnetic memory device executing data writing with data write magnetic fields in two directions
11/29/2005US6970377 Thin film magnetic memory device for conducting data write operation by application of a magnetic field
11/29/2005US6970376 Magnetic random access memory and method of writing data in magnetic random access memory
11/29/2005US6970374 Low leakage current static random access memory
11/29/2005US6970373 Method and apparatus for improving stability of a 6T CMOS SRAM cell
11/29/2005US6970371 Reference generator system and methods for reading ferroelectric memory cells using reduced bitline voltages
11/29/2005US6970370 Ferroelectric write once read only memory for archival storage
11/29/2005US6970369 Memory device
11/29/2005US6970028 DLL circuit
11/29/2005US6969895 MRAM cell with flat topography and controlled bit line to free layer distance and method of manufacture
11/29/2005US6969894 Variable threshold semiconductor device and method of operating same
11/29/2005US6969866 Electrically programmable memory element with improved contacts
11/29/2005US6969662 Semiconductor device
11/29/2005US6969652 Natural analog or multilevel transistor DRAM-cell
11/29/2005US6969617 Method for manufacturing NAND type nonvolatile ferroelectric memory cell
11/29/2005CA2296385C A replenishable one time use camera system
11/24/2005WO2005112119A1 Nrom device
11/24/2005WO2005112039A1 Latched programming of memory and method
11/24/2005WO2005112037A1 Boosting to control programming of non-volatile memory
11/24/2005WO2005112036A1 Bitune governed approach for program control of non-volatile memory
11/24/2005WO2005112034A2 Spin barrier enhanced magnetoresistance effect element and magnetic memory using the same
11/24/2005WO2005112033A1 Spin barrier enhanced dual magnetoresistance effect element and magnetic memory using the same
11/24/2005WO2005081798A3 Twin eeprom memory transistors with subsurface stepped floating gates
11/24/2005WO2005066970A3 Robust data duplication and improved update method in a multibit non-volatile memory
11/24/2005WO2005059953A3 Solid state magnetic memory system and method
11/24/2005WO2004003921A3 Mram architecture with electrically isolated read write circuitry
11/24/2005US20050262422 Semiconductor memory device for build-in fault diagnosis
11/24/2005US20050262369 Semiconductor memory device, and method of controlling the same
11/24/2005US20050262293 SRAM core cell for light-emitting display
11/24/2005US20050260839 Non-volatile resistance switching memory
11/24/2005US20050260774 Method of incorporating magnetic materials in a semiconductor manufacturing process
11/24/2005US20050260773 MRAM cell structure and method of fabrication
11/24/2005US20050260772 A method of forming a magnetic tunneling junction (mtj) mram device and a tunneling magnetoresistive (tmr) read head
11/24/2005US20050259501 Synchronous global controller for enhanced pipelining
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