Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
11/2005
11/17/2005US20050254336 Data strobe synchronization circuit and method for double data rate, multi-bit writes
11/17/2005US20050254331 Worldline decoder and memory device
11/17/2005US20050254329 Semiconductor device and programming method
11/17/2005US20050254328 Semiconductor memory device
11/17/2005US20050254327 Circuit and method for controlling a clock synchronizing circuit for low power refresh operation
11/17/2005US20050254321 Semiconductor memory
11/17/2005US20050254318 Memory device having delay locked loop
11/17/2005US20050254315 Device writing to a plurality of rows in a memory matrix simultaneously
11/17/2005US20050254313 Non-volatile semiconductor memory, semiconductor device and charge pump circuit
11/17/2005US20050254310 Nonvolatile semiconductor memory device including ferroelectric semiconductor pattern and methods for writing data in and reading data from the same
11/17/2005US20050254309 Program method of non-volatile memory device
11/17/2005US20050254308 High voltage generating circuit preserving charge pumping efficiency
11/17/2005US20050254307 Method and circuit arrangement for controlling write access to a semiconductor memory
11/17/2005US20050254304 Circuit and method for controlling boosting voltage
11/17/2005US20050254303 Nand flash memory device
11/17/2005US20050254302 Semiconductor memory device
11/17/2005US20050254301 Method of controlling page buffer having dual register and circuit thereof
11/17/2005US20050254300 Methods of sanitizing a flash-based data storage device
11/17/2005US20050254298 Channel erase type nonvolatile semiconductor memory device and electronic card and electronic apparatus using the device
11/17/2005US20050254297 Multi-input/output repair method of nand flash memory device and nand flash memory device thereof
11/17/2005US20050254296 Method for controlling current during read and program operations of programmable diode
11/17/2005US20050254295 Sensing scheme for programmable resistance memory using voltage coefficient characteristics
11/17/2005US20050254294 Magnetic random access memory
11/17/2005US20050254293 Novel structure/method to fabricate a high-performance magnetic tunneling junction MRAM
11/17/2005US20050254292 Magnetic memory device
11/17/2005US20050254291 Semiconductor memory component in cross-point architecture
11/17/2005US20050254290 Thin film magnetic memory device including memory cells having a magnetic tunnel junction
11/17/2005US20050254289 Magnetic memory device and method of manufacturing the same
11/17/2005US20050254288 Magnetic random access memory and method of writing data in magnetic random access memory
11/17/2005US20050254287 Spin barrier enhanced magnetoresistance effect element and magnetic memory using the same
11/17/2005US20050254286 Spin barrier enhanced dual magnetoresistance effect element and magnetic memory using the same
11/17/2005US20050254285 Cache late select circuit
11/17/2005US20050254284 Nano tube cell, and semiconductor device having nano tube cell and double bit line sensing structure
11/17/2005US20050254283 Non-volatile ferroelectric cell array circuit using PNPN diode characteristics
11/17/2005US20050254282 Reference generator system and methods for reading ferroelectric memory cells using reduced bitline voltages
11/17/2005US20050254279 DRAM memory cell arrangement
11/17/2005US20050253639 Output driver with pulse to static converter
11/17/2005US20050253638 Method and circuit arrangement for resetting an integrated circuit
11/17/2005US20050253287 Dual-port SRAM cell structure
11/17/2005US20050253182 Non-volatile memory, non-volatile memory array and manufacturing method thereof
11/17/2005US20050253143 Semiconductor memory device using vertical-channel transistors
11/17/2005DE102005018109A1 Speicher mit einstellbarer Zugriffszeit With adjustable memory access time
11/17/2005DE102004018715B3 Speicherzelle zum Speichern einer Information, Speicherschaltung sowie Verfahren zum Herstellen einer Speicherzelle Memory cell for storing information, memory circuit and method for fabricating a memory cell
11/17/2005DE102004014487A1 Speicherbauelement mit in isolierendes Material eingebettetem, aktiven Material Memory device having embedded in insulating material, active material
11/16/2005EP1596399A1 Semiconductor memory with refresh and redundancy circuit
11/16/2005EP1595263A2 Spin detection magnetic memory
11/16/2005EP1595262A1 Composite tension rod terminal systems
11/16/2005EP1595261A2 Dram output circuitry supporting sequential data capture to reduce core access times
11/16/2005EP1595254A1 Recording medium having data structure for managing reproduction duration of still pictures recorded thereon and recording and reproducing methods and apparatuses
11/16/2005EP1595251A1 Write-once optical disc, and method and apparatus for allocating spare area on write-once optical disc
11/16/2005EP1595213A2 Detection circuit for mixed asynchronous and synchronous memory operation
11/16/2005EP1573742A3 Magnetoresistive memory cell array and mram memory comprising such array
11/16/2005EP1537668A4 Synchronous mirror delay (smd) circuit and method including a ring oscillator for timing coarse and fine delay intervals
11/16/2005CN1697195A Memory element and memory device
11/16/2005CN1697185A Resistive cell structure for reducing soft error rate and inverter and forming method
11/16/2005CN1697184A Semiconductor memory
11/16/2005CN1697087A Circuit and method for controlling boosting voltage
11/16/2005CN1697085A Multi-input/output repair method of nand flash memory device and nand flash memory device thereof
11/16/2005CN1697083A NAND flash memory device
11/16/2005CN1697080A Method and system for a variable frequency SDRAM controller
11/16/2005CN1697079A Synchronous dynamic random access memory devices and methods of operating same
11/16/2005CN1697078A Semiconductor memory
11/16/2005CN1697077A Semiconductor memory
11/16/2005CN1697076A Method for controlling current during read and program operations of programmable diode
11/16/2005CN1227673C Plate line sensing storage cell and operation method
11/16/2005CN1227672C Method for reading out or in status from or to ferroelectrical transistor of memory cell and memory matrix
11/16/2005CN1227671C Method and device for reading memory cell of resistance crossover point array
11/16/2005CN1227669C Memory devices
11/15/2005US6965540 Memory device operable in either a high-power, full-page size mode or a low-power, reduced-page size mode
11/15/2005US6965539 Write path scheme in synchronous DRAM
11/15/2005US6965537 Memory system and method using ECC to achieve low power refresh
11/15/2005US6965536 Method and system for using dynamic random access memory as cache memory
11/15/2005US6965535 Integrated semiconductor memory circuit and a method for operating the same
11/15/2005US6965534 Random access memory using precharge timers in test mode
11/15/2005US6965533 Semiconductor device which is low in power and high in speed and is highly integrated
11/15/2005US6965532 Apparatus and method for controlling data output of a semiconductor memory device
11/15/2005US6965531 Semiconductor memory device having a reference cell
11/15/2005US6965528 Memory device having high bus efficiency of network, operating method of the same, and memory system including the same
11/15/2005US6965526 Sectored flash memory comprising means for controlling and for refreshing memory cells
11/15/2005US6965525 Clock synchronized nonvolatile memory device
11/15/2005US6965523 Multilevel memory device with memory cells storing non-power of two voltage levels
11/15/2005US6965522 Tunneling diode magnetic junction memory
11/15/2005US6965521 Read/write circuit for accessing chalcogenide non-volatile memory cells
11/15/2005US6965520 Delay system for generating control signals in ferroelectric memory devices
11/15/2005US6965142 Floating-gate semiconductor structures
11/15/2005US6965138 Magnetic memory device and method of manufacturing the same
11/15/2005US6965137 Multi-layer conductive memory device
11/15/2005US6965129 Thyristor-based device having dual control ports
11/15/2005US6964910 Methods of forming conductive capacitor plug in a memory array
11/15/2005CA2225355C Precharge-enabled self boosting word line driver for an embedded dram
11/10/2005WO2005106891A1 Methods and systems for high write performance in multi-bit flash memory devices
11/10/2005WO2005106890A1 An organic electronic circuit with functional interlayer and method for making the same
11/10/2005WO2005106889A1 Two conductor thermally assisted magnetic memory
11/10/2005WO2005106886A2 Refreshing data stored in a flash memory
11/10/2005WO2005106667A2 Error correction in an electronic circuit
11/10/2005US20050251729 Triple redundant latch design with low delay time
11/10/2005US20050251713 Multi-port memory device having serial I/O interface
11/10/2005US20050251356 Semiconductor memory device with ability to adjust impedance of data output driver
11/10/2005US20050249975 Organic electronic device and methods for manufacturing a device of this kind
11/10/2005US20050249029 Memory module and system, an information processing apparatus and a method of use
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