Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
12/2005
12/15/2005US20050276108 Concurrent programming of non-volatile memory
12/15/2005US20050276107 Nand flash memory and blank page search method therefor
12/15/2005US20050276106 NAND flash memory with nitride charge storage gates and fabrication process
12/15/2005US20050276105 Nand-type non-volatile memory cell and method for operating same
12/15/2005US20050276104 Reduced data line pre-fetch scheme
12/15/2005US20050276103 Non-volatile semiconductor memory device
12/15/2005US20050276102 System and method for limiting energy in an industrial control system
12/15/2005US20050276101 Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states
12/15/2005US20050276100 Method and system for optimizing the number of word line segments in a segmented MRAM array
12/15/2005US20050276099 Novel capping structure for enhancing dR/R of the MTJ device
12/15/2005US20050276098 Method and system for providing common read and write word lines for a segmented word line MRAM array
12/15/2005US20050276097 Sense amplifying magnetic tunnel device
12/15/2005US20050276095 Asynchronous static random access memory
12/15/2005US20050276094 Semiconductor memory
12/15/2005US20050276092 Virtual mass storage device for server management information
12/15/2005US20050276091 Semiconductor memory device
12/15/2005US20050276090 Nonvolatile magnetic memory device and photomask
12/15/2005US20050276089 Plateline voltage pulsing to reduce storage node disturbance in ferroelectric memory
12/15/2005US20050275986 Method and device for controlling internal power voltage, and semiconductor memory device having the same
12/15/2005US20050275977 Multi-level power supply system for a complementary metal oxide semiconductor circuit
12/15/2005US20050275815 Combined media-and ink-supply cartridge
12/15/2005US20050275435 Comparator using differential amplifier with reduced current consumption
12/15/2005US20050275433 Low-current and high-speed phase-change memory devices and methods of driving the same
12/15/2005US20050275117 Asymmetrical SRAM device and method of manufacturing the same
12/15/2005US20050275008 [non-volatile memory and fabrication thereof]
12/15/2005US20050274997 Method for fabricating magnetic field concentrators as liners around conductive wires in microelectronic devices
12/15/2005US20050274943 Organic bistable memory and method of manufacturing the same
12/15/2005DE19600049B4 Selbstbootstrapvorrichtung Selbstbootstrapvorrichtung
12/15/2005DE102005022611A1 Programmierverfahren für ein nichtflüchtiges Speicherbauelement A programming method for a non-volatile memory device
12/15/2005DE10017368B4 Verfahren zum Betrieb eines integrierten Speichers Method for operating an integrated memory
12/14/2005EP1605468A1 Semiconductor memory
12/14/2005EP1604370A1 Method and apparatus for establishing and maintaining desired read latency in high-speed dram
12/14/2005CN1708811A Magnetic tunnel junction memory cell architecture
12/14/2005CN1708810A Magnetoresistive random access memory
12/14/2005CN1708809A Reconfigurable electronic device having interconnected data storage devices
12/14/2005CN1707952A Electronic system, semiconductor integrated circuit and terminal apparatus
12/14/2005CN1707801A Semiconductor storage device
12/14/2005CN1707797A One-transistor random access memory cell, memory device and producing method thereof
12/14/2005CN1707796A Nonvolatile semiconductor memory device and a method of the same
12/14/2005CN1707795A Memory device and its manufacturing method
12/14/2005CN1707773A Standard cell, semiconductor integrated circuit device of standard cell scheme and layout design method for semiconductor integrated circuit device
12/14/2005CN1707696A Memory device
12/14/2005CN1707695A Memory device with memory matrix used for multi-bit inputting/outputting
12/14/2005CN1707694A Memory controller for use in multi-thread pipeline bus system and memory control method
12/14/2005CN1707693A Semiconductor memory device with ability to adjust impedance of data output driver
12/14/2005CN1707692A Duty cycle correction
12/14/2005CN1707691A Semiconductor integrated circuit device having power supply startup sequence
12/14/2005CN1707690A Semiconductor memory device having a global data bus
12/14/2005CN1707689A Magnetic random access memory
12/14/2005CN1231919C Method for updating dynamic memory
12/14/2005CN1231917C Thin film magnet memory capable of stably reading- out data and writing- in data
12/13/2005US6975575 Data storage media and methods utilizing a layer adjacent the storage layer
12/13/2005US6975559 Device and method for reading non-volatile memories having at least one pseudo-parallel communication interface
12/13/2005US6975558 Integrated circuit device
12/13/2005US6975557 Phase controlled high speed interfaces
12/13/2005US6975556 Circuit and method for controlling a clock synchronizing circuit for low power refresh operation
12/13/2005US6975555 Magnetic random access memory using memory cells with rotated magnetic storage elements
12/13/2005US6975554 Method and system for providing a shared write driver
12/13/2005US6975552 Hybrid open and folded digit line architecture
12/13/2005US6975551 Semiconductor storage, mobile electronic device, and detachable storage
12/13/2005US6975550 Array transistor amplification method and apparatus for dynamic random access memory
12/13/2005US6975548 Memory device having redundant memory cell
12/13/2005US6975546 Signal line driver circuit which reduces power consumption and enables high-speed data transfer
12/13/2005US6975544 Voltage discharge technique for controlling threshold-voltage characteristics of floating-gate transistor in circuitry such as flash EPROM
12/13/2005US6975541 Alternating application of pulses on two sides of a cell
12/13/2005US6975539 Digital multilevel non-volatile memory system
12/13/2005US6975538 Memory block erasing in a flash memory device
12/13/2005US6975537 Source side self boosting technique for non-volatile memory
12/13/2005US6975535 Electronic memory, such as flash EPROM, with bitwise-adjusted writing current or/and voltage
12/13/2005US6975534 Thin film magnetic memory device having a highly integrated memory array
12/13/2005US6975533 Hybrid semiconductor—magnetic spin based memory with low transmission barrier
12/13/2005US6975532 Quasi-static random access memory
12/13/2005US6975531 6F2 3-transistor DRAM gain cell
12/13/2005US6975530 Memory device comprising hysteretic capacitance means
12/13/2005US6975529 Ferroelectric memory with read-only memory cells, and fabrication method thereof
12/13/2005US6975164 Method and device for generating constant voltage
12/13/2005US6975163 Precision margining circuitry
12/13/2005US6975151 Latch circuit having reduced input/output load memory and semiconductor chip
12/13/2005US6975075 Field emission display
12/13/2005US6975041 Semiconductor storage device having high soft-error immunity
12/13/2005US6974708 Oxidation structure/method to fabricate a high-performance magnetic tunneling junction MRAM
12/08/2005WO2005117128A1 Tunnel junction barrier layer comprising a diluted semiconductor with spin sensitivity
12/08/2005WO2005117022A1 Reversed magnetic tunneling junction for power efficient byte writing of mram
12/08/2005WO2005117021A1 Non-volatile programmable memory
12/08/2005WO2005117020A2 Multimedia storage systems and methods
12/08/2005WO2005116917A1 Semiconductor memory card
12/08/2005WO2005041107A3 A method circuit and system for determining a reference voltage
12/08/2005US20050273670 Multi-port memory device
12/08/2005US20050273549 Memory device with user configurable density/performance
12/08/2005US20050273548 Memory system with user configurable density/performance option
12/08/2005US20050271516 Fan louver having its outlet grill and inlet grill each consisting of detachable sectors
12/08/2005US20050271179 Multi-strobe generation apparatus, test apparatus and adjustment method
12/08/2005US20050271085 Data transmission line of semiconductor memory device
12/08/2005US20050270893 Phase detector for all-digital phase locked and delay locked loops
12/08/2005US20050270891 Backwards-compatible memory module
12/08/2005US20050270890 Circuit and method for detecting frequency of clock signal and latency signal generation circuit of semiconductor memory device with the circuit
12/08/2005US20050270889 Dynamic random access memory (DRAM) capable of canceling out complimentary noise development in plate electrodes of memory cell capacitors
12/08/2005US20050270887 Magnetic random access memory
12/08/2005US20050270886 Ferroelectric memory device and read control method thereof
12/08/2005US20050270885 Semiconductor memory device
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