Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
11/2005
11/10/2005US20050249028 Method and apparatus for generating a sequence of clock signals
11/10/2005US20050249027 Delay locked loop device
11/10/2005US20050249026 Synchronous memory device
11/10/2005US20050249025 Method and System For A Variable Frequency SDRAM Controller
11/10/2005US20050249021 Semiconductor memory device having memory architecture supporting hyper-threading operation in host system
11/10/2005US20050249020 Multi-port memory device
11/10/2005US20050249019 Bus connection circuit for read operation of multi-port memory device
11/10/2005US20050249018 Multi-port memory device
11/10/2005US20050249017 Semiconductor device having a power down mode
11/10/2005US20050249016 Method for testing an integrated semiconductor memory
11/10/2005US20050249015 Multi-port memory device with global data bus connection circuit
11/10/2005US20050249013 Techniques for storing accurate operating current values
11/10/2005US20050249012 Semiconductor device with self refresh test mode
11/10/2005US20050249010 Memory controller method and system compensating for memory cell data losses
11/10/2005US20050249009 Efficient refresh operation for semiconductor memory devices
11/10/2005US20050249008 Silicon storage media, and controller thereof, controlling method thereof, and data frame based storage media
11/10/2005US20050249006 Low voltage high speed sensing
11/10/2005US20050249004 Semiconductor memory device and driving method thereof
11/10/2005US20050248997 Semiconductor memory device for controlling output timing of data depending on frequency variation
11/10/2005US20050248996 Integrated circuit for stabilizing a voltage
11/10/2005US20050248991 Non-volatile memory device and programming method thereof
11/10/2005US20050248989 Bitline governed approach for program control of non-volatile memory
11/10/2005US20050248988 Boosting to control programming of non-volatile memory
11/10/2005US20050248987 Operation method for non-volatile memory
11/10/2005US20050248986 High data rate write process for non-volatile flash memories
11/10/2005US20050248985 Semiconductor memory and control method thereof allowing high degree of accuracy in verify operation
11/10/2005US20050248983 Semiconductor memory device and method for masking predetermined area of memory cell array during write operation
11/10/2005US20050248981 Magnetic storage element, recording method using the same, and magnetic storage device
11/10/2005US20050248980 MRAM cell with flat topography and controlled bit line to free layer distance and method of manufacture
11/10/2005US20050248979 Non-switching pre- and post- disturb compensational pulses
11/10/2005US20050248978 1T1R resistive memory array with chained structure
11/10/2005US20050248977 Resistive cell structure for reducing soft error rate
11/10/2005US20050248976 Dynamic random access memory cell leakage current detector
11/10/2005US20050248975 Semiconductor storage device and its manufacturing method
11/10/2005US20050248974 Non-volatile ferroelectric cell array block having hierarchy transfer sensing architecture
11/10/2005US20050248755 Refresh counter with dynamic tracking of process, voltage and temperature variation for semiconductor memory
11/10/2005US20050248672 Semiconductor memory device
11/10/2005US20050248379 Data retaining circuit
11/10/2005US20050248375 Semiconductor memory device with ability to adjust impedance of data output driver
11/10/2005US20050247981 Memory device having shielded access lines
11/10/2005US20050247965 Ferroelectric memory device with a conductive polymer layer and a method of formation
11/10/2005US20050247964 Synthetic antiferromagnet structures for use in MTJs in MRAM technology
11/10/2005US20050247922 Phase random access memory with high density
11/10/2005US20050247793 Method of data distribution using ink dots on cards
11/10/2005DE102005018204A1 Magnetische Tunnelübergangsstruktur, MRAM-Zelle und Fotomaske Magnetic tunnel junction structure, MRAM cell and photomask
11/10/2005DE102005017087A1 Datenausleseschaltung und Halbleiterbauteil mit einer solchen Data read-out circuit and semiconductor device with such a
11/10/2005DE102005017012A1 NOR-Flashspeicherbauelement, zugehöriges Speichersystem und Programmierverfahren NOR flash memory device, memory system and associated method of programming
11/10/2005DE102005011859A1 Ein Entwurf eines dreifach redundanten Latches mit niedriger Verzögerungszeit A design of a triple redundant latches with low delay time
11/10/2005DE102005010796A1 Semiconductor memory has leakage controller to reduce charge transfer between storage circuit and bit line, before reading data from memory cell and storage circuit to generate read voltage for read circuit, based on stored data
11/10/2005DE102004021051B3 DRAM-Speicherzellenanordnung nebst Betriebsverfahren DRAM memory cell array in addition to operating procedures
11/10/2005CA2563551A1 An organic electronic circuit with functional interlayer and method for making the same
11/09/2005EP1593126A1 Mram architecture for low power consumption and high selectivity
11/09/2005EP1456850B1 Folded memory layers
11/09/2005EP1436147A4 A keyboard
11/09/2005EP1419507B1 Method and device for testing semiconductor memory devices
11/09/2005EP1129366B1 Magnetoresistive sensor or memory elements with decreased magnetic switch field
11/09/2005CN2739766Y Magnetic-resistance type RAM circuit
11/09/2005CN1695305A Synchronous mirror delay (SMD) circuit and method including a ring oscillator for timing coarse and fine delay intervals
11/09/2005CN1695291A Semiconductor integrated circuit device
11/09/2005CN1695249A Semiconductor method
11/09/2005CN1695247A Ferroelectric capacitor and method of manufacturing the same
11/09/2005CN1695203A Stacked organic memory devices and methods of operating and fabricating
11/09/2005CN1695202A Semiconductor storage device
11/09/2005CN1695201A Memory cell
11/09/2005CN1695200A Semiconductor memory
11/09/2005CN1695199A Method and apparatus for setting and compensating read latency in a high speed DRAM
11/09/2005CN1695125A Information processing device using variable operation frequency
11/09/2005CN1694241A Method and circuit arrangement for resetting an integrated circuit
11/09/2005CN1694182A Static dasd and control circuit and control method
11/09/2005CN1694181A Synchronous memory device
11/09/2005CN1694180A Multi-port memory device having serial i/o interface
11/09/2005CN1694179A Delay locked loop device
11/09/2005CN1694178A Multipor memory device
11/09/2005CN1694177A Semiconductor memory having variable memory size and method for refreshing the same
11/09/2005CN1694176A Multi-port memory device with global data bus connection circuit
11/09/2005CN1226749C Semiconductor memory and its access method
11/09/2005CN1226748C Semiconductor storing device
11/09/2005CN1226747C Magnetic storage equipment containing storage element exhibiting strong magnetic tunnel effect
11/09/2005CN1226745C Memory data bus structure and method for structuring multi-width character memory
11/08/2005US6963893 Methods of factoring and modular arithmetic
11/08/2005US6963518 Semiconductor memory having a pulse generator for generating column pulses
11/08/2005US6963516 Dynamic optimization of latency and bandwidth on DRAM interfaces
11/08/2005US6963515 Method and device for a scalable memory building block
11/08/2005US6963513 Fabrication method of semiconductor device
11/08/2005US6963509 Page buffer having dual register, semiconductor memory device having the same, and program method thereof
11/08/2005US6963508 Operation method for non-volatile memory
11/08/2005US6963505 Method circuit and system for determining a reference voltage
11/08/2005US6963504 Apparatus and method for disturb-free programming of passive element memory cells
11/08/2005US6963500 Magnetic tunneling junction cell array with shared reference layer for MRAM applications
11/08/2005US6963499 Static RAM with flash-clear function
11/08/2005US6963230 Internal power supply voltage generation circuit that can suppress reduction in internal power supply voltage in neighborhood of lower limit region of external power supply voltage
11/08/2005US6963099 Magnetic memory device and method of manufacturing the same
11/08/2005US6963098 Thermally operated switch control memory cell
11/08/2005US6962844 Memory device having a semiconducting polymer film
11/08/2005US6962841 Suppression of cross diffusion and gate depletion
11/08/2005CA2403541C Content-addressable memory device
11/03/2005WO2005104188A2 Polymer dielectrics for memory element array interconnect
11/03/2005WO2005104133A2 High density data storage
11/03/2005WO2005104132A1 Electronic circuit with memory for which a threshold level is selected
11/03/2005US20050243844 Point contact array, not circuit, and electronic circuit using the same
1 ... 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 ... 761