Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
10/2005
10/25/2005US6958929 Sensor compensation for environmental variations for magnetic random access memory
10/25/2005US6958928 Thin film magnetic memory device with memory cell having magnetic tunnel junction
10/25/2005US6958927 Magnetic element utilizing spin-transfer and half-metals and an MRAM device using the magnetic element
10/25/2005US6958638 Slew rate controlling method and system for output data
10/25/2005US6958548 Semiconductor device with magnetically permeable heat sink
10/25/2005US6958507 Semiconductor memory pipeline buffer
10/25/2005US6958502 Magnetic random access memory cell
10/25/2005US6958246 Methods of forming magnetoresistive memory devices
10/25/2005CA2369846C Interleaved wordline architecture
10/20/2005WO2005098953A1 Magnetization direction control method and mram using the same
10/20/2005WO2005098908A2 Creation of electron traps in metal nitride and metal oxide electrodes in polymer memory devices
10/20/2005WO2005098866A1 Rewriteable electronic fuses
10/20/2005WO2005098864A2 Circuit for accessing a chalcogenide memory array
10/20/2005WO2005098863A2 Method and apparatus achieving memory and transmission overhead reductions in a content routing network
10/20/2005WO2005064356A3 High sensitivity magnetic built-in current sensor
10/20/2005WO2004020683A3 Silver selenide film stoichiometry and morphology control in sputter deposition
10/20/2005US20050235175 Circuit for generating wait signal in semiconductor device
10/20/2005US20050235130 System for a memory device having a power down mode and method
10/20/2005US20050235118 Data storage circuit, data write method in the data storage circuit, and data storage device
10/20/2005US20050235102 Memory controller, semiconductor integrated circuit device, microcomputer, and electronic equipment
10/20/2005US20050235101 Memory controller, semiconductor integrated circuit device, semiconductor device, microcomputer, and electronic device
10/20/2005US20050235100 Semiconductor integrated circuit device, microcomputer, and electronic equipment
10/20/2005US20050235099 Memory device interface
10/20/2005US20050235066 Addressing data within dynamic random access memory
10/20/2005US20050234659 Write line design in MRAM
10/20/2005US20050233506 Semiconductor device with leakage implant and method of fabrication
10/20/2005US20050232676 Computer system having integrated printer and keyboard
10/20/2005US20050232675 Printer within a computer keyboard
10/20/2005US20050232386 Synchronization circuit and synchronization method
10/20/2005US20050232068 Semiconductor memory device
10/20/2005US20050232067 Semiconductor integrated circuit device and data write method thereof
10/20/2005US20050232065 Method and circuit for controlling operation mode of PSRAM
10/20/2005US20050232064 Method of accessing word line in semiconductor device
10/20/2005US20050232063 Circuit for generating data strobe signal in DDR memory device, and method therefor
10/20/2005US20050232059 Semiconductor device with non-volatile memory and random access memory
10/20/2005US20050232058 Semiconductor integrated circuit device having static random access memory mounted thereon
10/20/2005US20050232054 Semiconductor device
10/20/2005US20050232052 Apparatus and method for supplying power in semiconductor device
10/20/2005US20050232050 Refresh operation type semiconductor memory device capable of smoothly transferring special state to normal active state and its driving method
10/20/2005US20050232049 Semiconductor memory device
10/20/2005US20050232048 Memory device for controlling programming setup time
10/20/2005US20050232044 Semiconductor memory device
10/20/2005US20050232043 Semiconductor storage device
10/20/2005US20050232042 BLEQ driving circuit in semiconductor memory device
10/20/2005US20050232038 Semiconductor memory device
10/20/2005US20050232035 Semiconductor memory device having redundancy cell array shared by a plurality of memory cell arrays
10/20/2005US20050232034 Auxiliary device for operating M-DOC series flash memory and non-X86 system processor in synchronism
10/20/2005US20050232033 Data input apparatus of DDR SDRAM and method thereof
10/20/2005US20050232026 Ultraviolet erasable semiconductor memory device
10/20/2005US20050232025 Page buffer having dual register, semiconductor memory device having the same, and program method thereof
10/20/2005US20050232022 Flash memory device capable of preventing an over-erase of flash memory cells and erase method thereof
10/20/2005US20050232019 Sequential program-verify method with result buffering
10/20/2005US20050232017 Nonvolatile semiconductor memory device for writing multivalued data
10/20/2005US20050232014 Write/delete process for resistive switching memory components
10/20/2005US20050232011 Memory devices with page buffer having dual registers and metod of using the same
10/20/2005US20050232010 Segmented metal bitlines
10/20/2005US20050232009 CMIS semiconductor nonvolatile storage circuit
10/20/2005US20050232008 Semiconductor integrated circuit and nonvolatile memory element
10/20/2005US20050232006 Magnetic random access memory
10/20/2005US20050232005 Non-orthogonal write line structure in MRAM
10/20/2005US20050232003 MRAM including unit cell formed of one transistor and two magnetic tunnel junctions (MTJs) and method for fabricating the same
10/20/2005US20050232002 Magnetic random access memory
10/20/2005US20050232001 Semiconductor integrated circuit device and magnetic memory device capable of maintaining data integrity
10/20/2005US20050232000 Method of making information storage devices by molecular photolithography
10/20/2005US20050231999 Data readout circuit and semiconductor device having the same
10/20/2005US20050231998 Nonvolatile ferroelectric memory device with split word lines
10/20/2005US20050231997 Apparatus and methods for ferroelectric ram fatigue testing
10/20/2005US20050231996 Writing to ferroelectric memory devices
10/20/2005US20050231995 Nonvolatile ferroelectric memory device
10/20/2005US20050231994 Ferroelectric nonvolatile code data output device
10/20/2005US20050231993 Multi-bit ROM cell, for storing one of n>4 possible states and having bi-directional read, an array of such cells, and a method for making the array
10/20/2005US20050231992 Re-writable memory with multiple memory layers
10/20/2005US20050231991 Semiconductor device having a power down mode
10/20/2005US20050231855 NANO-electronic memory array
10/20/2005US20050231267 High voltage generation circuit
10/20/2005US20050231266 High voltage generation circuit
10/20/2005US20050231257 Data retaining circuit
10/20/2005US20050230974 Vibration based power generator
10/20/2005US20050230788 Magnetic shield member, magnetic shield structure, and magnetic memory device
10/20/2005US20050230771 Magnetic tunnel junction structures having bended tips at both ends thereof, magnetic random access memory cells employing the same and photomasks used in formation thereof
10/20/2005US20050230727 Ferroelectric memory device and method of manufacturing the same
10/20/2005US20050230724 3D cross-point memory array with shared connections
10/20/2005US20050230723 Mram in-pixel memory for display devices
10/20/2005US20050230710 Nanotube relay device
10/20/2005EP1573081A3 Silver selenide film stoichiometry and morphology control in sputter deposition
10/20/2005DE10393657T5 Verfahren und Vorrichtung zur Datenabfrage Method and apparatus for data query
10/19/2005EP1587137A1 Deposition process for non-volatile resistance switching memory
10/19/2005EP1552526A4 Magnetic element utilizing spin transfer and an mram device using the magnetic element
10/19/2005EP1171920A4 Electrically programmable memory element with improved contacts
10/19/2005EP0921528B1 A memory device using direct access mode test and a method of testing the same
10/19/2005CN1685526A Spin transistor using spin filter effect and nonvolatile memory using spin transistor
10/19/2005CN1685445A Method and circuitry for identifying weak bits in a MRAM
10/19/2005CN1685441A Semiconductor memory
10/19/2005CN1685440A Refreshing of multi-port memory in integrated circuits
10/19/2005CN1685439A Composite storage circuit and semiconductor device having the same composite storage circuit
10/19/2005CN1685438A Bias sensing in DRAM sense amplifiers
10/19/2005CN1685437A System for controlling mode changes in a voltage down-converter
10/19/2005CN1684200A Semiconductor storage device
10/19/2005CN1684199A Internal voltage generation circuit of semiconductor memory device
10/19/2005CN1684198A Refresh operation type semiconductor memory device capable of smoothly transferring special state to normal active state and its driving method
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