Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
12/2005
12/29/2005US20050285626 Circuits and methods of temperature compensation for refresh oscillator
12/29/2005US20050285259 Semiconductor device with magnetically permeable heat sink
12/29/2005US20050285210 Semiconductor integrated circuit device
12/29/2005US20050285096 Programmable structure, an array including the structure, and methods of forming the same
12/29/2005US20050285093 Magnetic storage device using ferromagnetic tunnel junction element
12/29/2005US20050284929 Portable storage apparatus
12/29/2005DE112004000176T5 Magnetspeicherzelle, Magnetspeicher und Magnetspeicher-Herstellverfahren The magnetic memory cell, the magnetic memory and magnetic storage manufacturing
12/29/2005DE102004046549A1 High voltage generating circuit for use in semiconductor memory device, has ripple reduction circuit limiting voltage level of high voltage applied from pumping output terminal of pump when pump is in one operating mode
12/29/2005DE102004026808A1 Abwärtskompatibler Speicherbaustein Compatible memory module downward
12/29/2005DE102004026128A1 Integrierter Halbleiterspeicher mit mindestens einer Wortleitung und mit einer Vielzahl von Speicherzellen Integrated semiconductor memory having at least one word line and a plurality of memory cells
12/28/2005EP1610391A2 Spin transistor, programmable logic circuit, and magnetic memory
12/28/2005EP1610387A1 Memory cell, memory using the memory cell, memory cell manufacturing method, and memory recording/reading method
12/28/2005EP1610342A1 Integrated circuit device with automatic internal command function
12/28/2005EP1610341A2 Magnetic random access memory array with coupled soft magnetic adjacent layer
12/28/2005EP1610340A1 Magnetic memory device, sense amplifier circuit, and reading method of magnetic memory device
12/28/2005EP1610339A1 Magnetic memory device and read method thereof
12/28/2005EP1610335A2 Non-volatile memory and its sensing method
12/28/2005EP1609153A1 Simultaneous reading from and writing to different memory cells
12/28/2005EP1540658B1 Refreshing of multi-port memory in integrated circuits
12/28/2005EP1325500B1 Ferroelectric memory and method of operating same
12/28/2005CN1714407A Control of memory arrays utilizing zener diode-like devices
12/28/2005CN1714404A Method and system to store information
12/28/2005CN1714403A Using a MOS select gate for a phase change memory
12/28/2005CN1714402A Magnetic storage unit using ferromagnetic tunnel junction element
12/28/2005CN1714401A SDRAM address mapping optimized for two-dimensional access
12/28/2005CN1713400A Spin transistor, programmable logic circuit, and magnetic memory
12/28/2005CN1713390A Semiconductor device and method for fabricating the same
12/28/2005CN1713387A 半导体存储器件 A semiconductor memory device
12/28/2005CN1713385A Nand flash memory with nitride charge storage gates and fabrication process
12/28/2005CN1713299A Magnetic memory unit and fabricating method thereof
12/28/2005CN1234173C Method for operating two transistor static random access storage unit
12/27/2005US6981196 Data storage method for use in a magnetoresistive solid-state storage device
12/27/2005US6981100 Synchronous DRAM with selectable internal prefetch size
12/27/2005US6981091 Using transfer bits during data transfer from non-volatile to volatile memories
12/27/2005US6980480 Multi-frequency synchronizing clock signal generator
12/27/2005US6980479 Semiconductor device for domain crossing
12/27/2005US6980477 Chopper sensor for MRAM
12/27/2005US6980476 Memory device with test mode for controlling of bitline sensing margin time
12/27/2005US6980474 Semiconductor memory device
12/27/2005US6980470 Magnetic storage element, recording method using the magnetic storage element
12/27/2005US6980469 High speed low power magnetic devices based on current induced spin-momentum transfer
12/27/2005US6980468 High density MRAM using thermal writing
12/27/2005US6980466 Soft-reference four conductor magnetic memory storage device
12/27/2005US6980465 Addressing circuit for a cross-point memory array including cross-point resistive elements
12/27/2005US6980464 Magnetic random access memory
12/27/2005US6980463 Semiconductor memory device including memory cell portion and peripheral circuit portion
12/27/2005US6980462 Memory cell architecture for reduced routing congestion
12/27/2005US6980461 Reference current generator, and method of programming, adjusting and/or operating same
12/27/2005US6980460 Semiconductor integrated circuit device and operation method therefor
12/27/2005US6980459 Non-volatile SRAM
12/27/2005US6980458 Sensing circuit for ferroelectric non-volatile memories
12/27/2005US6980457 Thyristor-based device having a reduced-resistance contact to a buried emitter region
12/27/2005US6980455 Remote sensed pre-amplifier for cross-point arrays
12/27/2005US6980454 Low-power consumption semiconductor memory device
12/27/2005US6980448 DRAM boosted voltage supply
12/27/2005US6980043 Ferroelectric element and a ferroelectric gate device using the same
12/27/2005US6980036 Semiconductor device comprising frequency multiplier of external clock and output buffer of test data and semiconductor test method
12/27/2005US6980019 Output buffer apparatus capable of adjusting output impedance in synchronization with data signal
12/27/2005US6979851 Structure and method of vertical transistor DRAM cell having a low leakage buried strap
12/27/2005US6979849 Memory cell having improved interconnect
12/27/2005US6979837 Stacked organic memory devices and methods of operating and fabricating
12/27/2005US6979607 Technique to control tunneling currents in DRAM capacitors, cells, and devices
12/27/2005US6979590 Methods of making electromechanical three-trace junction devices
12/27/2005US6979586 Magnetic random access memory array with coupled soft adjacent magnetic layer
12/27/2005CA2412169C Addressing of memory matrix
12/22/2005WO2005122244A1 Semiconductor storage
12/22/2005WO2005122180A1 Method for inspecting semiconductor memory
12/22/2005WO2005122177A1 Semiconductor integrated circuit
12/22/2005WO2005121960A1 Operating a storage component
12/22/2005US20050283689 Error correction in ROM embedded DRAM
12/22/2005US20050283657 Semiconductor memory device
12/22/2005US20050283515 Methods of factoring and modular arithmetic
12/22/2005US20050282379 Spin transistor, programmable logic circuit, and magnetic memory
12/22/2005US20050282332 Non-volatile memory cell and method of operating the same
12/22/2005US20050281129 Semiconductor memory
12/22/2005US20050281126 Nonvolatile memory and method of driving the same
12/22/2005US20050281124 Method for accessing a single port memory
12/22/2005US20050281118 Integrated semiconductor memory comprising at least one word line and comprising a multiplicity of memory cells
12/22/2005US20050281114 Shared decoupling capacitance
12/22/2005US20050281112 Semiconductor memory device and refresh period controlling method
12/22/2005US20050281110 Semiconductor integrated circuit device
12/22/2005US20050281109 SRAM memory cell and method for compensating a leakage current flowing into the SRAM memory cell
12/22/2005US20050281107 Semiconductor memory
12/22/2005US20050281106 Semiconductor memory device for low power consumption
12/22/2005US20050281105 Memory card, semiconductor device, and method of controlling semiconductor memory
12/22/2005US20050281099 Apparatus and method for improving dynamic refresh in a memory device
12/22/2005US20050281095 Partitionable memory device, system, and method
12/22/2005US20050281094 Semicondutor memory device and array internal power voltage generating method thereof
12/22/2005US20050281091 Fast memory
12/22/2005US20050281090 Memory architecture with segmented writing lines
12/22/2005US20050281086 Non-volatile semiconductor memory
12/22/2005US20050281085 Operation scheme for programming charge trapping non-volatile memory
12/22/2005US20050281084 Methods of making electromechanical three-trace junction devices
12/22/2005US20050281083 System for aligning a charge tunnel of an ink jet printer
12/22/2005US20050281082 Non-volatile memory using organic bistable device
12/22/2005US20050281081 Heat assisted switching in an MRAM cell utilizing the antiferromagnetic to ferromagnetic transition in FeRh
12/22/2005US20050281080 Magnetic random access memory array having bit/word lines for shared write select and read operations
12/22/2005US20050281079 Magnetic random access memory and method of manufacturing the same
12/22/2005US20050281078 Method and system for data communication on a chip
12/22/2005US20050281076 Memory circuit comprising redundant memory areas
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