Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
05/2014
05/14/2014CN103794243A 一种磁性位单元双电压写入方法 A magnetic bit cell dual voltage writing method
05/14/2014CN102479546B 一种对电阻存储器进行编程的电路 Kind of resistance memory programming circuit
05/14/2014CN102385914B 半导体存储器以及位元单元追踪方法 Semiconductor memory and bit cell tracking method
05/14/2014CN102347070B 电荷回收电路 Charge recovery circuit
05/14/2014CN101809668B 用于在高速动态随机存取存储器中处理信号的系统及方法 For high-speed dynamic random access memory system and a method for processing a signal
05/14/2014CN101257084B 相变化存储器及其制造方法 The method of manufacturing a phase change memory and its
05/13/2014US8724424 Semiconductor memory device using only single-channel transistor to apply voltage to selected word line
05/13/2014US8724423 Synchronous two-port read, two-port write memory emulator
05/13/2014US8724420 SRAM write assist apparatus
05/13/2014US8724417 Semiconductor system and device, and method for controlling refresh operation of stacked chips
05/13/2014US8724416 Information processing system including semiconductor device having self-refresh mode
05/13/2014US8724415 Storage control device controlling refresh frequency based on temperature
05/13/2014US8724413 High capacity low cost multi-state magnetic memory
05/13/2014US8724404 Memory, supply voltage generation circuit, and operation method of a supply voltage generation circuit used for a memory array
05/13/2014US8724401 Data stripes and addressing for flash memory devices
05/13/2014US8724395 Nonvolatile memory device and related programming method
05/13/2014US8724394 Nonvolatile memory device and operating method thereof
05/13/2014US8724392 Controller management of memory array of storage device using magnetic random access memory (MRAM)
05/13/2014US8724390 Architecture for a 3D memory array
05/13/2014US8724388 Adaptively programming or erasing flash memory blocks
05/13/2014US8724387 Method, system, and computer readable medium for reading and programming flash memory cells using multiple bias voltages
05/13/2014US8724386 nvSRAM with inverted recall
05/13/2014US8724383 Nonvolatile semiconductor memory device
05/13/2014US8724381 Methods and apparatus for storing data in a multi-level cell flash memory device with cross-page sectors, multi-page coding and per-page coding
05/13/2014US8724379 Magnetic memory with a domain wall
05/13/2014US8724378 Shared transistor in a spin-torque transfer magnetic random access memory (STTMRAM) cell
05/13/2014US8724377 Memory device and method for manufacturing the same
05/13/2014US8724376 Antiferromagnetic storage device
05/13/2014US8724375 SRAM cell having an N-well bias
05/13/2014US8724374 Data-dependent pullup transistor supply and body bias voltage application for a static random access memory (SRAM) cell
05/13/2014US8724373 Apparatus for selective word-line boost on a memory cell
05/13/2014US8724372 Capacitor-less memory cell, device, system and method of making same
05/13/2014US8724371 Semiconductor memory device and memory cell voltage application method
05/13/2014US8724370 Semiconductor storage device
05/13/2014US8724369 Composition of memory cell with resistance-switching layers
05/13/2014US8724368 Method for driving semiconductor memory device
05/13/2014US8724367 Method and apparatus pertaining to a ferroelectric random access memory
05/13/2014US8724366 Quantum dot optical devices with enhanced gain and sensitivity and methods of making same
05/13/2014US8723155 Memory cells and integrated devices
05/13/2014US8722211 Magnetic memory devices and methods of manufacturing such magnetic memory devices
05/08/2014WO2014071175A1 Integration of single-level and multi-level flash cells having different tunnel oxide thicknesses
05/08/2014WO2014071049A2 Dram-type device with low variation transistor peripheral circuits, and related methods
05/08/2014WO2014070852A1 Sram cells suitable for fin field-effect transistor (finfet) process
05/08/2014WO2014070702A1 Dummy read to prevent crowbar current during read-write collisions in memory arrays with crosscoupled bitline keepers
05/08/2014WO2014070263A2 Magnetoresistive random access memory
05/08/2014WO2014068961A1 Nonvolatile semiconductor storage device
05/08/2014WO2014068281A1 Low power latching circuits
05/08/2014WO2014067971A1 Device for transmitting geolocation and measurement data, and associated method
05/08/2014US20140129767 Apparatus and method for implementing a multi-level memory hierarchy
05/08/2014US20140126314 Memory Architecture With Local And Global Control Circuitry
05/08/2014US20140126311 Refresh control circuit of semiconductor apparatus
05/08/2014US20140126307 Techniques for refreshing a semiconductor memory device
05/08/2014US20140126300 Semiconductor Memory Device, Information Processing System Including the Same, and Controller
05/08/2014US20140126284 Mram sensing with magnetically annealed reference cell
05/08/2014US20140126283 Multilevel magnetic element
05/08/2014US20140126282 Reading a cross point cell array
05/08/2014US20140126281 Multiple bit nonvolatile memory based on current induced domain wall motion in a nanowire magnetic tunnel junction
05/08/2014US20140126280 Multiple bit nonvolatile memory based on current induced domain wall motion in a nanowire magnetic tunnel junction
05/08/2014US20140126279 Magnetoresistive random access memory
05/08/2014US20140126278 Semiconductor memory device that can stably perform writing and reading without increasing current consumption even with a low power supply voltage
05/08/2014US20140126277 Sram with buffered-read bit cells and its testing
05/08/2014US20140126274 Memory circuit and method of operating the memory circui
05/08/2014US20140126273 Power management sram global bit line precharge circuit
05/08/2014US20140126271 Semiconductor device and driving method thereof
05/08/2014US20140126269 Resistive memory
05/08/2014US20140124882 Systems and methods for implementing magnetoelectric junctions having improved read-write characteristics
05/08/2014DE112012003458T5 Leseerkennung in Halbleiter-Speichereinheiten Reading detection in semiconductor memory units
05/08/2014DE102006032948B4 Integrierte Empfängerschaltungen Integrated receiver circuits
05/08/2014DE102005016299B4 Tastverhältniskorrektur Tastverhältniskorrektur
05/07/2014EP2727114A1 Shiftable memory
05/07/2014EP2727113A2 Mechanism for facilitating fine-grained self-refresh control for dynamic memory devices
05/07/2014EP2727112A1 Sensing circuit
05/07/2014EP2727111A1 Sensing circuit
05/07/2014CN103782343A 具有替换控制栅极和附加浮置栅极的nvm位单元 Has replaced the control gate and the floating gate nvm additional bit cell
05/07/2014CN103778960A 用于电阻型存储器的感测放大器中的写驱动器 For the resistive memory, the write sense amplifier drive
05/07/2014CN103778955A 集成电路及其制造方法 And a method of manufacturing an integrated circuit
05/07/2014CN103778954A 抗多节点翻转的存储器 Anti-memory multi-node flip
05/07/2014CN103778953A Sram的存储单元 Sram storage unit
05/07/2014CN102411984B 具有基于行的读和/或写辅助电路的存储单元 Having a memory cell row-based reading and / or writing auxiliary circuits
05/07/2014CN102150214B 用于基于电阻的存储器应用的存储器装置 For resistance-based memory device memory applications
05/07/2014CN102005453B 三维结构存储器 Three-dimensional structure of the memory
05/07/2014CN101861623B 编程期间偏置相邻字线以验证的非易失性存储器和方法 The method of biasing a nonvolatile memory and an adjacent word line during programming to verify the
05/07/2014CN101681674B 具有延迟跟踪以获得经改进时序容限的存储器装置 With a delay tracking to obtain timing margin improved memory device
05/07/2014CN101650971B 非易失性半导体存储电路 The nonvolatile semiconductor memory circuit
05/07/2014CN101452991B 具有热辅助写入的磁元件 With a heat-assisted magnetic write element
05/06/2014USRE44878 Current switched magnetoresistive memory cell
05/06/2014US8717842 Multi-port memory based on DRAM core
05/06/2014US8717837 Memory module
05/06/2014US8717831 Memory circuit
05/06/2014US8717827 Method for the permanently reliable programming of multilevel cells in flash memories
05/06/2014US8717826 Estimation of memory cell wear level based on saturation current
05/06/2014US8717825 Memory device and corresponding reading method
05/06/2014US8717824 Threshold voltage digitizer for array of programmable threshold transistors
05/06/2014US8717823 Multiple level program verify in a memory device
05/06/2014US8717819 NAND flash memory programming
05/06/2014US8717818 Storage device architecture
05/06/2014US8717816 Semiconductor memory device
05/06/2014US8717815 Compensation of back pattern effect in a memory device
05/06/2014US8717813 Method and apparatus for leakage suppression in flash memory in response to external commands
05/06/2014US8717812 Thermally assisted magnetic random access memory element with improved endurance
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