Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
07/2014
07/23/2014EP2756530A1 Strain induced reduction of switching current in spintransfer torque switching devices
07/23/2014EP2756502A1 Memory system with a layer comprising a dedicated redundancy area
07/23/2014EP2756501A1 Adaptive read wordline voltage boosting apparatus and method for multi-port sram
07/23/2014EP2756500A1 Apparatus for selective word-line boost on a memory cell
07/23/2014EP2756499A1 Improving sram cell writability
07/23/2014CN203733474U 一种同步存储器 A synchronous memory
07/23/2014CN103946997A 具有双隧道势垒的磁器件及其制造方法 A magnetic device and manufacturing method of the double tunnel barrier
07/23/2014CN103946974A 存储元件、存储装置 Storage element, the storage device
07/23/2014CN103946817A 半导体存储装置及其驱动方法 Semiconductor memory device and driving method
07/23/2014CN103946805A 用于动态读取的清除技术 Clear technology for dynamic read
07/23/2014CN103943144A 参考电阻优化的相变存储器读电路及参考电阻优选方法 Reference resistor optimization phase change memory read circuit and a reference resistor preferred method
07/23/2014CN103943143A Sram电压辅助 Sram voltage auxiliary
07/23/2014CN103943142A 一种静态随机存储器及其位线预充电自定时电路 One kind of static random access memory and a bit line precharge self-timed circuit
07/23/2014CN103943141A 用于实施基于地址的sram访问协助的系统和方法 System and method for implementing sram-based access assistance addresses
07/23/2014CN103943140A 具有感测放大器的互补金属氧化物半导体(cmos)动态随机存取存储器(dram)单元 A sense amplifier having complementary metal oxide semiconductor (cmos) dynamic random access memory (dram) unit
07/23/2014CN103943139A 存储器漏电控制装置 Memory leakage control device
07/23/2014CN103943138A 每单元多比特存储装置 Multi-bit per cell storage device
07/23/2014CN102157196B 基于自参考反相器的1t1r型阻变存储器及其读写方法 1t1r type resistive memory based self-reference of the inverter and read and write methods
07/23/2014CN101866684B 半导体存储器装置及其刷新控制方法 The semiconductor memory device and its refresh control method
07/23/2014CN101681666B 用于浮体单元内存的读出装置及其方法 Floating body memory cell reading device and a method for
07/22/2014USRE45035 Verification circuits and methods for phase change memory array
07/22/2014US8788906 Memory device with internal signal processing unit
07/22/2014US8788898 Remote testing system
07/22/2014US8788780 Signal restoration circuit, latency adjustment circuit, memory controller, processor, computer, signal restoration method, and latency adjustment method
07/22/2014US8788743 Mapping between program states and data patterns
07/22/2014US8788741 Method and apparatus adapted to prevent code data from being lost in solder reflow
07/22/2014US8787107 Memory device power control
07/22/2014US8787102 Memory device and signal processing circuit
07/22/2014US8787094 Soft erase operation for 3D non-volatile memory with selective inhibiting of passed bits
07/22/2014US8787090 Memory cell operation
07/22/2014US8787088 Optimized erase operation for non-volatile memory with partially programmed block
07/22/2014US8787086 Inhibiting address transitions in unselected memory banks of solid state memory circuits
07/22/2014US8787085 Semiconductor memory having both volatile and non-volatile functionality and method of operating
07/22/2014US8787084 Semiconductor device and driving method thereof
07/22/2014US8787083 Memory circuit
07/22/2014US8787081 Data path for multi-level cell memory, methods for storing and methods for utilizing a memory array
07/22/2014US8787078 Method and apparatus for reducing read disturb in memory
07/22/2014US8787077 Nonvolatile memory device
07/22/2014US8787076 Magnetic memory and method of manufacturing the same
07/22/2014US8787075 Low-voltage semiconductor memory
07/22/2014US8787074 Static random access memory test structure
07/22/2014US8787073 Signal processing circuit and method for driving the same
07/22/2014US8787072 Floating-body/gate DRAM cell
07/22/2014US8787071 Nonvolatile storage device and method for writing into the same
07/22/2014US8787070 Reference cell circuit and variable resistance nonvolatile memory device including the same
07/22/2014US8787069 Write and erase scheme for resistive memory device
07/22/2014US8787068 Semiconductor device
07/22/2014US8787067 Semiconductor device and method of controlling semiconductor device
07/22/2014US8787066 Method for forming resistive switching memory elements with improved switching behavior
07/22/2014US8787064 Programmable bipolar electronic device
07/22/2014US8787063 Analog memories utilizing ferroelectric capacitors
07/22/2014US8785288 Methods of making memory cells
07/17/2014WO2014110566A1 Non-volatile register with magnetic tunneling junctions and with edge detector for low read disturb of the mtjs
07/17/2014WO2014110341A1 Resistive random access memory cells having variable switching characteristics
07/17/2014WO2014110183A1 Systems and methods to update reference voltages in response to data retention in non-volatile memory
07/17/2014WO2014110050A1 Memory device having an adaptable number of open rows
07/17/2014WO2014109978A1 Mg discontinuous insertion layer for improving mt j shunt
07/17/2014WO2014108215A1 Asymmetrical memristor
07/17/2014US20140201436 DRAM Memory Interface
07/17/2014US20140201435 Heterogeneous memory systems, and related methods and computer-readable media for supporting heterogeneous memory access requests in processor-based systems
07/17/2014US20140198597 Dynamic random access memory for communications systems
07/17/2014US20140198596 Circuit for controlling sense amplifier source node in semiconductor memory device and controlling method thereof
07/17/2014US20140198568 Non-volatile memory systems and methods
07/17/2014US20140198564 Magnetoresistive element and method of manufacturing the same
07/17/2014US20140198563 Magnetic tunneling junction non-volatile register with feedback for robust read and write operations
07/17/2014US20140198562 Ten-transistor dual-port sram with shared bit-line architecture
07/17/2014US20140198560 Memory cell and memory device having the same
07/17/2014US20140197847 Resistive memory element sensing using averaging
07/17/2014DE102013200615A1 Komplementärer Widerstandsschalter, dessen Herstellung und Verwendung Resistance complementary switch, its preparation and use
07/17/2014DE102013103400B4 Sram-zelle, die finfets umfasst SRAM cell, which comprises FinFETs
07/16/2014EP2755208A1 Multiport memory with matching address and data line control
07/16/2014EP2755207A1 Multiport memory with matching address control
07/16/2014CN103930949A 具有双栅预充电和解码晶体管的读出放大器 Has a double gate transistor precharge and decode the sense amplifier
07/16/2014CN103928610A 浮栅型阻变存储单元结构及其操作方法 Resistive-type floating gate memory cell structure and methods of operating
07/16/2014CN103928607A 提供具有易锥各向异性的磁性隧道结元件的方法和系统 Provide a method and system with easy cone anisotropy magnetic tunnel junction element
07/16/2014CN103928465A 一种基于半浮栅的双管增益存储器器件结构 Based on the double-barreled semi-floating gate memory device structures gain
07/16/2014CN103928051A 一种随机存储器位单元、随机存储器和电子芯片 One kind of random access memory bit cells, random access memory, and electronic chip
07/16/2014CN103928050A 存储单元和具有存储单元的存储设备 A storage unit and a storage device having a storage unit,
07/16/2014CN103928049A 带有匹配地址控制的多端口存储器 With a matching address control of multi-port memory
07/16/2014CN103928048A 带有匹配地址和数据线控制的多端口存储器 With a matching address and data lines to control the multi-port memory
07/16/2014CN102339638B 具有电子反射绝缘间隔层的stram Stram with an electronic reflective insulating spacer layer
07/16/2014CN102203869B 利用场感应反铁磁性或铁磁性耦合的自旋转矩转移单元结构 Using field sensing ferromagnetic or antiferromagnetic coupling of the spin torque transfer unit structure
07/16/2014CN102194757B 半导体器件的制造方法和半导体器件 The method of manufacturing a semiconductor device and a semiconductor device
07/16/2014CN101874271B 读出列选择和读出数据总线预充电控制信号的互锁 The readout column selection and readout data bus precharge control signal interlocking
07/16/2014CN101030592B 磁存储器件 Magnetic memory device
07/15/2014US8782474 Advanced converters for memory cell sensing and methods
07/15/2014US8780665 Method and system for providing magnetic tunneling junction elements having an easy cone anisotropy
07/15/2014US8780662 Semiconductor memory device including initialization signal generation circuit
07/15/2014US8780661 Self refresh pulse generation circuit
07/15/2014US8780658 Leakage reduction in memory devices
07/15/2014US8780642 Split gate NAND flash memory structure and array, method of programming, erasing and reading thereof, and method of manufacturing
07/15/2014US8780641 Method and apparatus for dynamic sensing window in memory
07/15/2014US8780638 Random telegraph signal noise reduction scheme for semiconductor memories
07/15/2014US8780637 Updating reference voltages to compensate for changes in threshold voltage distributions of nonvolatile memory cells
07/15/2014US8780629 Semiconductor device and driving method thereof
07/15/2014US8780625 Memory array
07/15/2014US8780624 Memory array
07/15/2014US8780623 Semiconductor memory device and control method thereof
07/15/2014US8780622 Phase-change memory with multiple polarity bits having enhanced endurance and error tolerance
07/15/2014US8780621 Semiconductor integrated circuit system and method for driving the same
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