| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 08/05/2014 | US8797798 Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks |
| 08/05/2014 | US8797794 Thyristor memory and methods of operation |
| 08/05/2014 | US8797793 Self-referenced MRAM element with linear sensing signal |
| 08/05/2014 | US8797792 Non-reversible state at a bitcell having a first magnetic tunnel junction and a second magnetic tunnel junction |
| 08/05/2014 | US8797791 Semiconductor integrated circuit device with reduced leakage current |
| 08/05/2014 | US8797790 Memory elements with soft error upset immunity |
| 08/05/2014 | US8797789 Sense amplifier |
| 08/05/2014 | US8797788 Semiconductor device |
| 08/05/2014 | US8797787 Semiconductor manufacturing method |
| 08/05/2014 | US8797786 Static RAM |
| 08/05/2014 | US8797785 Semiconductor device |
| 08/05/2014 | US8797784 Filamentary memory devices and methods |
| 08/05/2014 | US8797783 Four capacitor nonvolatile bit cell |
| 08/05/2014 | US8797779 Memory module with memory stack and interface with enhanced capabilites |
| 08/05/2014 | US8796660 Nonvolatile memory element comprising a resistance variable element and a diode |
| 08/05/2014 | US8796046 Methods of integrated shielding into MTJ device for MRAM |
| 07/31/2014 | WO2014116906A1 Recovery of nearby data in programming of non-volatile multi-level multiple memory die |
| 07/31/2014 | WO2014116742A1 Method and apparatus for ameliorating peripheral edge damage in magnetoresistive tunnel junction (mtj) device ferromagnetic layers |
| 07/31/2014 | WO2014116737A1 Process and apparatus for transforming nitridation/oxidation at edges, and protecting edges of magnetoresistive tunnel junction (mtj) layers |
| 07/31/2014 | WO2014116655A1 Static random access memories (sram) with read-preferred cell structures, write drivers, related systems, and methods |
| 07/31/2014 | WO2014116612A1 Low power static random access memory |
| 07/31/2014 | WO2014114550A1 Mram element with low writing temperature |
| 07/31/2014 | WO2014114406A1 Back gate in select transistor for edram |
| 07/31/2014 | WO2014051729A3 3d memory configurable for performance and power |
| 07/31/2014 | US20140215164 Multiport Memory Architecture |
| 07/31/2014 | US20140215142 Dram refresh method and system |
| 07/31/2014 | US20140215141 High-Speed Processor Core Comprising Mapped Auxilliary Component Functionality |
| 07/31/2014 | US20140211583 Information processing system including semiconductor device having self-refresh mode |
| 07/31/2014 | US20140211579 Apparatus, method and system to determine memory access command timing based on error detection |
| 07/31/2014 | US20140211559 Programming a split gate bit cell |
| 07/31/2014 | US20140211558 Signal processing circuit |
| 07/31/2014 | US20140211557 Voltage assisted stt-mram writing scheme |
| 07/31/2014 | US20140211552 Memory device using spin hall effect and methods of manufacturing and operating the memory device |
| 07/31/2014 | US20140211551 Mram self-repair with bist logic |
| 07/31/2014 | US20140211549 Accommodating balance of bit line and source line resistances in magnetoresistive random access memory |
| 07/31/2014 | US20140211548 Low power static random access memory |
| 07/31/2014 | US20140211547 Memory cell array latchup prevention |
| 07/31/2014 | US20140211546 Static random access memories (sram) with read-preferred cell structures, write drivers, related systems, and methods |
| 07/31/2014 | US20140211545 Semiconductor device |
| 07/31/2014 | US20140211542 Memory Element With a Reactive Metal Layer |
| 07/31/2014 | US20140211533 Two Capacitor Self-Referencing Nonvolatile Bitcell |
| 07/31/2014 | US20140211532 Four Capacitor Nonvolatile Bit Cell |
| 07/31/2014 | US20140210026 Short circuit reduction in a ferroelectric memory cell comprising a stack of layers arranged on a flexible substrate |
| 07/31/2014 | DE112012004304T5 Magnetoresistiver Direktzugriffsspeicher mit Mehrbit-Spinmomenttransfer mit einem einzelnen Stapel von Magnettunnelübergängen A magnetoresistive random access memory having multi-bit spin torque transfer with a single stack of magnetic tunnel junctions |
| 07/31/2014 | DE112008001757B4 Systeme und Verfahren zum Bestimmen einer Aktualisierungsrate eines Speichers auf der Basis von HF-Aktivitäten Systems and methods for determining a refresh rate of a memory on the basis of RF activities |
| 07/30/2014 | EP2760025A1 TAS-MRAM element with low writing temperature |
| 07/30/2014 | EP2758963A1 On chip dynamic read for non-volatile storage |
| 07/30/2014 | EP2758962A1 Thermally tolerant perpendicular magnetic anisotropy coupled elements for spin-transfer torque switching device |
| 07/30/2014 | CN103959407A 具有低写入错误率的自旋转移力矩磁存储元件 Spin-transfer torque magnetic memory element having a low write error rate |
| 07/30/2014 | CN103959389A 固态储存设备中的读取检测 Solid-state storage device reads detected |
| 07/30/2014 | CN103959388A 用于调度包括电力状态的存储器刷新操作的方法 The method of scheduling including power state for memory refresh operation |
| 07/30/2014 | CN103959387A 动态存储器的增强数据保留模式 Enhanced dynamic memory data retention mode |
| 07/30/2014 | CN103956184A 一种基于dice结构的改进sram存储单元 An improved sram memory cell structure-based dice |
| 07/30/2014 | CN103956183A 抗辐射sram单元 Rad sram unit |
| 07/30/2014 | CN103956182A 随机访问存储器单元结构、随机访问存储器及其操作方法 Random access memory cell structure, a random access memory and operating method |
| 07/30/2014 | CN103956181A 一种电压刷新装置及存储系统 A voltage-refresh device and storage systems |
| 07/30/2014 | CN103956180A 磁阻随机存取存储器（mram）位单元的阵列结构设计 Array design magnetoresistive random access memory (mram) bit cells |
| 07/30/2014 | CN103956178A 半导体存储装置的温度检测电路 The temperature sensing circuit of the semiconductor memory device |
| 07/30/2014 | CN102272965B 具有存储层材料的磁性元件 Layer material having a memory of a magnetic element |
| 07/30/2014 | CN101771068B 半导体器件及其制造方法 Semiconductor device and manufacturing method thereof |
| 07/29/2014 | USRE45051 Page buffer circuit of memory device and program method |
| 07/29/2014 | US8793556 Systems and methods for reclaiming flash blocks of a flash drive |
| 07/29/2014 | US8792293 Single-ended sense amplifier for solid-state memories |
| 07/29/2014 | US8792289 Rewriting a memory array |
| 07/29/2014 | US8792284 Oxide semiconductor memory device |
| 07/29/2014 | US8792282 Nonvolatile memory devices, memory systems and computing systems |
| 07/29/2014 | US8792277 Split data error correction code circuits |
| 07/29/2014 | US8792275 Non-volatile static random access memory (NVSRAM) device |
| 07/29/2014 | US8792273 Data storage system with power cycle management and method of operation thereof |
| 07/29/2014 | US8792272 Implementing enhanced data partial-erase for multi-level cell (MLC) memory using threshold voltage-drift or resistance drift tolerant moving baseline memory data encoding |
| 07/29/2014 | US8792271 Magnetic memory device and method of magnetic domain wall motion |
| 07/29/2014 | US8792270 Programmable resistance memory |
| 07/29/2014 | US8792269 Fast programming of magnetic random access memory (MRAM) |
| 07/29/2014 | US8792267 Memory having sense amplifier for output tracking by controlled feedback latch |
| 07/29/2014 | US8792266 Resistance-change type non-volatile semiconductor memory |
| 07/29/2014 | US8792265 Phase change material for a phase change memory device and method for adjusting the resistivity of the material |
| 07/29/2014 | US8792264 Method of switching out-of-plane magnetic tunnel junction cells |
| 07/29/2014 | US8790935 Method of manufacturing a magnetoresistive-based device with via integration |
| 07/29/2014 | US8790798 Magnetoresistive element and method of manufacturing the same |
| 07/29/2014 | US8790797 Spin injection source and manufacturing method thereof |
| 07/24/2014 | WO2014113726A1 Estimation of memory data |
| 07/24/2014 | WO2014113588A1 Dynamic adjustment of read voltage levels based on memory cell threshold voltage distribution |
| 07/24/2014 | WO2014113402A1 Systems and methods of updating read voltages |
| 07/24/2014 | WO2014070852A4 Sram cells suitable for fin field-effect transistor (finfet) process |
| 07/24/2014 | WO2014058994A3 Memory device with timing overlap mode |
| 07/24/2014 | US20140204697 Integrated circuits and methods for dynamic frequency scaling |
| 07/24/2014 | US20140204689 Apparatus and methods of driving signal for reducing the leakage current |
| 07/24/2014 | US20140204670 Semiconductor Memory Device Using Only Single-Channel Transistor to Apply Voltage to Selected Word Line |
| 07/24/2014 | US20140204663 Efficient pcms refresh mechanism |
| 07/24/2014 | US20140204662 Apparatus for initializing perpendicular mram device |
| 07/24/2014 | US20140204661 Memory with elements having two stacked magnetic tunneling junction (mtj) devices |
| 07/24/2014 | US20140204660 Memory having sense amplifier for output tracking by controlled feedback latch |
| 07/24/2014 | US20140204658 Memory Cell Flipping for Mitigating SRAM BTI |
| 07/24/2014 | US20140204657 Sram voltage assist |
| 07/24/2014 | US20140204656 Low voltage dual supply memory cell with two word lines and activation circuitry |
| 07/24/2014 | US20140204655 Memory device, semiconductor device, and detecting method |
| 07/24/2014 | US20140204654 Complementary metal-oxide-semiconductor (cmos) dynamic random access memory (dram) cell with sense amplifier |
| 07/24/2014 | US20140204645 Semiconductor device |
| 07/24/2014 | DE102008008596B4 Arbeitsverfahren für eine integrierte Schaltung, integrierte Schaltungen und Verfahren zum Bestimmen eines Arbeitspunktes Working method for an integrated circuit, integrated circuits and methods for determining an operating point |
| 07/24/2014 | DE102006032951B4 Halbleiterspeicher mit einem blockreservierten programmierbaren Latenz-Register Semiconductor memory with a block reserved programmable latency register |