Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
04/2014
04/09/2014CN103714851A Method and circuit for multi-bit resistance measurement
04/09/2014CN103714850A Apparatus and methods for digital configuration of integrated circuits
04/09/2014CN103714849A Programmable storage unit for programmable chip
04/09/2014CN103714848A SRAM (static random access memory) unit
04/09/2014CN103714842A Memorizer device and voltage control method thereof
04/09/2014CN102385915B Random access memory, memory device and method for operating memory device
04/09/2014CN102324248B Wire or matching circuit possessing low power consumption
04/09/2014CN102138182B Programming and selectively erasing non-volatile storage
04/09/2014CN101908374B Method for low-stress multilevel reading of phase change memory cells and multilevel phase change memory
04/08/2014US8694714 Retargeting of a write operation retry in the event of a write operation failure
04/08/2014US8693279 Synchronous global controller for enhanced pipelining
04/08/2014US8693271 Method of stressing static random access memories for pass transistor defects
04/08/2014US8693261 Method for programming a floating gate
04/08/2014US8693260 Memory array with two-phase bit line precharge
04/08/2014US8693258 Obtaining soft information using a hard interface
04/08/2014US8693256 FTP memory device with single selection transistor
04/08/2014US8693255 Method for driving a nonvolatile semiconductor memory device
04/08/2014US8693254 Non-volatile semiconductor memory device
04/08/2014US8693251 Processors for programming multilevel-cell NAND memory devices
04/08/2014US8693248 Nonvolatile data storage devices, program methods thereof, and memory systems including the same
04/08/2014US8693246 Memory controller self-calibration for removing systemic influence
04/08/2014US8693244 Electronic circuit with a floating gate transistor and a method for deactivating a floating gate transistor temporarily
04/08/2014US8693243 Memory array
04/08/2014US8693242 Nanotube based nanoelectromechanical device
04/08/2014US8693241 Semiconductor intergrated circuit device, method of manufacturing the same, and method of driving the same
04/08/2014US8693240 Method and apparatus for reading a magnetic tunnel junction using a sequence of short pulses
04/08/2014US8693239 Memory element and memory device
04/08/2014US8693238 MRAM having variable word line drive potential
04/08/2014US8693237 Single-ended SRAM with cross-point data-aware write operation
04/08/2014US8693235 Methods and apparatus for finFET SRAM arrays in integrated circuits
04/08/2014US8693234 Memory unit and method of operating the same
04/08/2014US8693233 Re-writable resistance-switching memory with balanced series stack
04/08/2014US8693232 Non-volatile memory cell including a resistivity change material
04/03/2014WO2014051855A1 Split-gate memory cell with substrate stressor region, and method of making same
04/03/2014WO2014051724A1 Decreased switching current in spin-transfer torque memory
04/03/2014WO2014050050A1 Semiconductor device having hierarchically structured word lines
04/03/2014WO2014049935A1 Storage element, storage apparatus, and magnetic head
04/03/2014WO2014048758A1 Magnetic logic unit (mlu) cell and amplifier having a linear magnetic signal
04/03/2014WO2014048757A1 Magnetic logic unit (mlu) cell and amplifier having a linear magnetic signal
04/03/2014US20140095781 Phase change memory in a dual inline memory module
04/03/2014US20140092699 Intermediate circuit and method for dram
04/03/2014US20140092698 Semiconductor device and operating method thereof
04/03/2014US20140092691 Semiconductor storage device
04/03/2014US20140092680 Multiple well bias memory
04/03/2014US20140092678 Intelligent far memory bandwith scaling
04/03/2014US20140092677 Decreased switching current in spin-transfer torque memory
04/03/2014US20140092676 Integrated Circuit With Separate Supply Voltage For Memory That Is Different From Logic Circuit Supply Voltage
04/03/2014US20140092675 Two-port sram write tracking scheme
04/03/2014US20140092673 Memory cell
04/03/2014US20140092672 Power management domino sram bit line discharge circuit
04/03/2014US20140092667 Data storage in memory array with less than half of cells in any row and column in low-resistance states
04/03/2014US20140092666 Low voltage embedded memory having conductive oxide and electrode stacks
04/02/2014CN103700398A Static random storage unit
04/02/2014CN103700397A Static random access memory (SRAM) storage unit, writing operation method of SRAM storage unit and SRAM memory
04/02/2014CN103700396A SRAM (static random access memory)-oriented anti-SEU (single-event upset) error accumulation controller and method
04/02/2014CN103700395A Memory units
04/02/2014CN103700394A 16-bit DDR (Double Data Rate) SDRAM (Synchronous Dynamic Random Access Memory) interface
04/02/2014CN103700393A Intermediate circuit and method for DRAM
04/02/2014CN102436847B PMOS (P-channel Metal Oxide Semiconductor) pipe band-pass-band-stop changeable threshold circuit and PMOS pipe high-pass-low-pass changeable threshold circuit
04/02/2014CN102426855B 8-value memory cell embedded in DRAM storage matrix, and corresponding conversion circuit thereof
04/02/2014CN102326204B Spin-transfer torque memory self-reference read method
04/02/2014CN101625890B Operation method of magnetic random access memory device
04/02/2014CN101364432B Programmable control block for dual port sram application
04/01/2014US8689077 Memory controller method and system compensating for memory cell data losses
04/01/2014US8688877 Multiport memory architecture
04/01/2014US8687456 Multi-port memory based on DRAM core
04/01/2014US8687446 Semiconductor device with self refresh test mode
04/01/2014US8687436 Increasing efficiency of memory accesses by selectively introducing a relative delay between the time that write addresses are provided to the memory and the time that write data is provided to the memory
04/01/2014US8687425 Nonvolatile memory device, method for operating the same, and method for fabricating the same
04/01/2014US8687422 Method for operating a NAND flash memory device in multiple operational modes
04/01/2014US8687420 Nonvolatile semiconductor memory device
04/01/2014US8687419 Adjusting operational parameters for memory cells
04/01/2014US8687418 Flash memory with nano-pillar charge trap
04/01/2014US8687417 Electronic device and method of biasing
04/01/2014US8687416 Signal processing circuit comprising buffer memory device
04/01/2014US8687415 Domain wall motion in perpendicularly magnetized wires having artificial antiferromagnetically coupled multilayers with engineered interfaces
04/01/2014US8687414 Magnetic memory element and magnetic random access memory
04/01/2014US8687413 Magnetic memory with phonon glass electron crystal material
04/01/2014US8687412 Reference cell configuration for sensing resistance states of MRAM bit cells
04/01/2014US8687411 Memory device, semiconductor device, and detecting method for defective memory cell in memory device
04/01/2014US8687410 Nonvolatile memory cell comprising a diode and a resistance-switching material
04/01/2014US8687409 Variable resistance nonvolatile memory device
04/01/2014US8687408 Highly integrated programmable non-volatile memory and manufacturing method thereof
04/01/2014US8687407 Semiconductor device including storage device and method for driving the same
04/01/2014US8687406 Semiconductor memory device and method of controlling the same
04/01/2014US8687405 Phase change memory and method for fabricating phase change memory
04/01/2014US8687404 Memory element and drive method for the same, and memory device
04/01/2014US8687403 Circuits having programmable impedance elements
04/01/2014US8687402 Silicon-based nanoscale resistive device with adjustable resistance
04/01/2014US8687401 Ferro-resistive random access memory (Ferro-RRAM), operation method and manufacturing method thereof
04/01/2014US8686520 Spin-torque magnetoresistive structures
03/2014
03/27/2014WO2014046887A1 Block and page level bad bit line and bits screening method for non-volatile memory
03/27/2014WO2014046784A1 Interfacing between integrated circuits with asymmetric voltage swing
03/27/2014WO2014046361A1 Magnetic memory element using in-plane current and electric field
03/27/2014WO2014046360A1 Horizontal magnetic memory element using in-plane current and electric field
03/27/2014WO2014045598A1 Semiconductor device
03/27/2014WO2011097021A3 A read disturb free smt mram reference cell circuit
03/27/2014US20140089577 Volatile memory device and memory controller
03/27/2014US20140089575 Semiconductor Memory Asynchronous Pipeline
03/27/2014US20140085997 Semiconductor device having hierarchical bit line structure
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