Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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06/12/2014 | WO2014086990A1 Varistor |
06/12/2014 | WO2014086718A1 Self-referenced magnetic random access memory (mram) and method for writing to the mram cell with increased reliability and reduced power consumption |
06/12/2014 | US20140164692 Managing errors in a dram by weak cell encoding |
06/12/2014 | US20140164691 Memory architecture for display device and control method thereof |
06/12/2014 | US20140160874 Power management in semiconductor memory system |
06/12/2014 | US20140160840 Memory device and driving method thereof |
06/12/2014 | US20140160836 Three-dimensional memory array and operation scheme |
06/12/2014 | US20140160835 Spin transfer torque magnetic memory device |
06/12/2014 | US20140160834 Frequency Resistance Access Magnetic Memory |
06/12/2014 | DE102013224082A1 System und Verfahren zur Ausführung einer SRAM-Schreibunterstützung System and method for performing an SRAM write support |
06/11/2014 | EP2741296A1 Self-referenced magnetic random access memory (MRAM) and method for writing to the MRAM cell with increased reliability and reduced power consumption |
06/11/2014 | EP2741295A1 Spin transfer torque magnetic memory device |
06/11/2014 | EP2740123A1 Multi-bit magnetic memory cell |
06/11/2014 | EP2740122A1 Short circuit reduction in an electronic component comprising a stack of layers arranged on a flexible substrate |
06/11/2014 | CN203644398U 防止存储器芯片内部存储单元上下电被改写电路结构 To prevent the upper and lower memory cells inside the memory chip is rewritten electrical circuit configuration |
06/11/2014 | CN103858349A Semiconductor device |
06/11/2014 | CN103858246A Strain induced reduction of switching current in spintransfer torque switching devices |
06/11/2014 | CN103858171A Reduced noise DRAM sensing |
06/11/2014 | CN103858170A Contact structure and method for variable impedance memory element |
06/11/2014 | CN103858169A Multi-bit spin-momentum-transfer magnetoresistence random access memory with single magnetic-tunnel-junction stack |
06/11/2014 | CN103855301A Multi-stage resistance conversion storage unit and storage device |
06/11/2014 | CN103855299A Method and system for providing magnetic junctions having a thermally stable and easy to switch magnetic free layer |
06/11/2014 | CN103855297A MAGNETIC JUNCTION, method for providing same, and magnetic memory comprising same |
06/11/2014 | CN103854697A Static random access memory cell comprising fin type field effect transistor |
06/11/2014 | CN103854696A SRAM cell comprising FinFET |
06/11/2014 | CN103854695A Voltage generating device |
06/11/2014 | CN103854694A Multi-phase clock generation circuit |
06/11/2014 | CN103854693A Magnetoresistive random access memory (mram) differential bit cell and method of use |
06/11/2014 | CN103853522A Folded fifo memory generator |
06/11/2014 | CN102314938B Memory chip and memory device using the same |
06/11/2014 | CN101842843B MRAM testing |
06/11/2014 | CN101751994B Nonvolatile semiconductor memory device having uniform operational characteristics for memory cells |
06/11/2014 | CN101114693B Semiconductor device using magnetic domain wall moving |
06/10/2014 | US8750068 Memory system and refresh control method thereof |
06/10/2014 | US8750066 Temperature compensation of conductive bridge memory arrays |
06/10/2014 | US8750062 Memory element and method for determining the data state of a memory element |
06/10/2014 | US8750049 Word line driver for memory |
06/10/2014 | US8750038 Nonvolatile memory device and method of operating the same |
06/10/2014 | US8750036 Unipolar spin-transfer switching memory unit |
06/10/2014 | US8750035 Memory element and memory device |
06/10/2014 | US8750034 Magnetoresistance element and semiconductor memory device |
06/10/2014 | US8750033 Reading a cross point cell array |
06/10/2014 | US8750032 Semiconductor recording device |
06/10/2014 | US8750031 Test structures, methods of manufacturing thereof, test methods, and MRAM arrays |
06/10/2014 | US8750030 Magnetoresistive element and magnetic random access memory |
06/10/2014 | US8750029 Magnetoresistive effect element and magnetic memory |
06/10/2014 | US8750028 Magnetic memory element and driving method for same |
06/10/2014 | US8750027 SRAM devices and methods of manufacturing the same |
06/10/2014 | US8750026 Integrated circuits with asymmetric and stacked transistors |
06/10/2014 | US8750025 Data cells with drivers and methods of making and operating the same |
06/10/2014 | US8750024 Memcapacitor |
06/10/2014 | US8750023 Semiconductor memory device |
06/10/2014 | US8750021 Bipolar resistive-switching memory with a single diode per memory cell |
06/10/2014 | US8750020 Resistive switching for non volatile memory device using an integrated breakdown element |
06/10/2014 | US8750019 Resistive memory using SiGe material |
06/10/2014 | US8750018 Sense amplifier circuitry for resistive type memory |
06/10/2014 | US8750017 Resistance-change memory |
06/10/2014 | US8750016 Resistive memory and program verification method thereof |
06/10/2014 | US8750015 Integrated circuit comprising a FRAM memory and method for granting read-access to a FRAM memory |
06/10/2014 | US8750013 Racetrack memory with low-power write |
06/10/2014 | US8750012 Racetrack memory with low-power write |
06/05/2014 | WO2014085347A1 An integrated circuit having improved radiation immunity |
06/05/2014 | WO2014085268A1 Apparatus, method and system for memory device access with a multi-cycle command |
06/05/2014 | WO2014085267A1 Apparatus, method and system for providing termination for multiple chips of an integrated circuit package |
06/05/2014 | WO2014085257A1 Adaption of memory operation parameters according to predicted variations in cell dimension |
06/05/2014 | WO2014084917A1 Row hammer monitoring based on stored row hammer threshold value |
06/05/2014 | WO2014082897A1 Magnetic random access memory (mram) cell with low power consumption |
06/05/2014 | WO2014082896A1 Magnetoresistive element having enhanced exchange bias and thermal stability for spintronic devices |
06/05/2014 | WO2014059083A3 Improved seed layer for multilayer magnetic materials |
06/05/2014 | US20140156923 Row hammer monitoring based on stored row hammer threshold value |
06/05/2014 | US20140153352 Semiconductor device including plural chips stacked to each other |
06/05/2014 | US20140153345 Method of operating write assist circuitry |
06/05/2014 | US20140153328 Complementary soi lateral bipolar for sram in a cmos platform |
06/05/2014 | US20140153327 Voltage controlled spin transport channel |
06/05/2014 | US20140153325 Body voltage sensing based short pulse reading circuit |
06/05/2014 | US20140153324 Magnetic Tunnel Junction Memory Device |
06/05/2014 | US20140153323 Methods for Operating SRAM Cells |
06/05/2014 | US20140153322 SRAM Cell Comprising FinFETs |
06/05/2014 | US20140153321 Methods and Apparatus for FinFET SRAM Arrays in Integrated Circuits |
06/05/2014 | US20140153320 Semiconductor storage device |
06/05/2014 | US20140153319 Semiconductor memory device |
06/05/2014 | US20140153313 System and Methods Using a Multiplexed Reference for Sense Amplifiers |
06/05/2014 | US20140153312 Memory cells having ferroelectric materials |
06/05/2014 | US20140153311 Semiconductor storage device |
06/05/2014 | DE102013103400A1 Sram-zelle, die finfets umfasst SRAM cell, which comprises FinFETs |
06/05/2014 | DE102007030973B4 Speichervorrichtung und Verfahren zur Betätigung einer Speichervorrichtung, insbesondere eines DRAM Memory device and method of operating a memory device, in particular a DRAM |
06/04/2014 | EP2738770A1 Low resistance area magnetic stack |
06/04/2014 | EP2738769A1 Magnetoresistive element having enhanced exchange bias and thermal stability for spintronic devices |
06/04/2014 | EP2737488A2 Post-write read in non-volatile memories using comparison of data as written in binary and multi-state formats |
06/04/2014 | EP2737487A1 Simultaneous sensing of multiple wordlines and detection of nand failures |
06/04/2014 | EP2737486A2 Non-volatile memory and method with accelerated post-write read using combined verification of multiple pages |
06/04/2014 | EP2737485A1 Nvm bitcell with a replacement control gate and additional floating gate |
06/04/2014 | EP2737484A1 Non-volatile memory saving cell information in a non-volatile memory array |
06/04/2014 | CN1836288B Read bias scheme for phase change memories |
06/04/2014 | CN103843067A On chip dynamic read for non-volatile storage |
06/04/2014 | CN103843066A Pseudo-inverter circuit with multiple independent gate transistors |
06/04/2014 | CN103843065A Improving sram cell writability |
06/04/2014 | CN103839580A Writing acceleration method and system for phase change memory |
06/04/2014 | CN103839579A Dynamic random access memory apparatus |
06/04/2014 | CN103839578A Method for prolonging data hold time of NAND-based solid-state memory |