Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
03/2014
03/27/2014US20140085975 Current monitoring circuit for memory wakeup time
03/27/2014US20140085973 Method, system and device for recessed contact in memory array
03/27/2014US20140085972 Semiconductor memory device, memory system and access method to semiconductor memory device
03/27/2014US20140085971 Magnetoresistive effect element
03/27/2014US20140085970 Magnetic memory
03/27/2014US20140085969 Nonvolatile memory device
03/27/2014US20140085968 Nonvolatile memory device
03/27/2014US20140085967 Memory elements with relay devices
03/27/2014US20140085966 Field effect transistors including asymmetrical silicide structures and related devices
03/27/2014US20140085965 Column select multiplexer and method for static random-access memory and computer memory subsystem employing the same
03/27/2014US20140085963 Systems and methods for writing and non-destructively reading ferroelectric memories
03/27/2014US20140085962 Systems and methods for reading ferroelectric memories
03/27/2014DE112012002442T5 Magnetisches Speichersystem und Verfahren in verschiedenen Betriebsmodi A magnetic storage system and method in different modes
03/26/2014EP2712079A1 Magnetic logic unit (MLU) cell and amplifier having a linear magnetic signal
03/26/2014EP2712078A1 Magnetic logic unit (MLU) cell and amplifier having a linear magnetic signal
03/26/2014EP2711932A1 Systems and methods for reading ferroelectric memories
03/26/2014EP2711931A1 Systems and methods for writing and non-destructively reading ferroelectric memories
03/26/2014EP2710596A2 Systems and methods for preventing data remanence in memory systems
03/26/2014EP2710475A1 Non-volatile memory and method with small logical groups distributed among active slc and mlc memory partitions
03/26/2014CN103688311A Mechanism for facilitating fine-grained self-refresh control for dynamic memory devices
03/26/2014CN103688246A A non-volatile memory and a method with small logical groups distributed among active SLC and MLC memory partitions
03/26/2014CN103682084A Magnetic memory device and method of forming same
03/26/2014CN103680616A Variable resistance memory device and operating method thereof
03/26/2014CN103680605A M+n bit programming and m+l bit read for m bit memory cells
03/26/2014CN103680604A Resistive switching memory
03/26/2014CN103680603A Resistance memory array and operation method thereof
03/26/2014CN103680602A Resistive random access memory and reset operation method thereof
03/26/2014CN103680601A Column select multiplexer, method for static random-access memory and computer memory subsystem employing the same
03/26/2014CN103680600A Storing device suitable for data with different bit widths
03/26/2014CN103680599A Memory device and memory system including the same
03/26/2014CN103680598A Memory and memory system including the same
03/26/2014CN103680597A Integrated circuit and method of operating the same
03/26/2014CN103680596A Semiconductor memory array and access method thereof
03/26/2014CN103680595A Cell array, memory, and memory system including the same
03/26/2014CN103680594A Memory device for reducing a write fail, a system including the same, and a method thereof
03/26/2014CN103680593A Refresh control circuit and semiconductor memory device including the same
03/26/2014CN102354525B Bolt-lock system used in a plurality of memory blocks of a memory circuit
03/26/2014CN102103886B Method for programming multi-level memory cells and memory device
03/26/2014CN101783170B Circuit and method for driving resistive random access memory to realize multi-valued storage
03/26/2014CN101496109B Non-volatile memory having a multiple block erase mode and method therefor
03/25/2014US8683165 Memory system having a plurality of types of memory chips and a memory controller for controlling the memory chips
03/25/2014US8681567 Voltage regulator for biasing a NAND memory device
03/25/2014US8681566 Apparatus and methods of driving signal for reducing the leakage current
03/25/2014US8681565 Semiconductor memory device
03/25/2014US8681563 Flash multiple-pass write with accurate first-pass write
03/25/2014US8681562 Memories and methods of programming memories
03/25/2014US8681561 Apparatuses and methods including memory write operation
03/25/2014US8681560 Circuit for the optimization of the programming of a flash memory
03/25/2014US8681558 Parallel bitline nonvolatile memory employing channel-based processing technology
03/25/2014US8681556 Non-volatile semiconductor memory device
03/25/2014US8681552 System and method for accessing and storing interleaved data
03/25/2014US8681546 Variable impedance control for memory devices
03/25/2014US8681544 Method of operating semiconductor memory device
03/25/2014US8681542 Magnetic memory devices and methods of operating the same
03/25/2014US8681541 Magnetic memory with separate read and write paths
03/25/2014US8681540 Tile-level snapback detection through coupling capacitor in a cross point array
03/25/2014US8681539 STRAM with composite free magnetic element
03/25/2014US8681538 Semiconductor storage device
03/25/2014US8681537 Nonvolatile memory apparatus having magnetoresistive memory elements and method for driving the same
03/25/2014US8681536 Magnetic tunnel junction (MTJ) on planarized electrode
03/25/2014US8681535 Nonvolatile latch circuit
03/25/2014US8681534 Dual port register file memory cell with reduced susceptibility to noise during same row access
03/25/2014US8681533 Memory circuit, signal processing circuit, and electronic device
03/25/2014US8681532 Resistance change memory
03/25/2014US8681531 Memory cells, methods of forming memory cells, and methods of programming memory cells
03/25/2014US8681530 Nonvolatile memory device having a current limiting element
03/25/2014US8681529 Apparatuses and operation methods associated with resistive memory cell arrays with separate select lines
03/25/2014US8680887 Nonvolatile configuration memory
03/25/2014US8680632 Magnetoresistive element and magnetic memory
03/25/2014US8679977 Method and apparatus providing multi-planed array memory device
03/25/2014US8679912 Semiconductor device having different non-volatile memories having nanocrystals of differing densities and method therefor
03/20/2014WO2014043578A1 Otp cell with reversed mtj connection
03/20/2014WO2014043575A1 Otp scheme with multiple magnetic tunnel junction devices in a cell
03/20/2014WO2014043570A1 Mram with write driver shared by data cell and reference cell
03/20/2014WO2014043466A1 Improved storage element for stt mram applications
03/20/2014WO2014043137A1 Resistive devices and methods of operation thereof
03/20/2014WO2014043109A1 Single-crystal phase change material on insulator for reduced cell variability
03/20/2014WO2013173538A3 Controlling mram cell bias voltages
03/20/2014WO2013150260A3 Sram device with memory cells each having a dedicated access connection to|common read/write circuit
03/20/2014US20140082272 Memory Reorder Queue Biasing Preceding High Latency Operations
03/20/2014US20140078849 Control of inputs to a memory device
03/20/2014US20140078848 Semiconductor memory device, memory controller, and data processing system including these
03/20/2014US20140078847 Memory refresh methods, memory section control circuits, and apparatuses
03/20/2014US20140078846 Semiconductor memory device capable of performing refresh operation without auto refresh command
03/20/2014US20140078845 Cell array, memory, and memory system including the same
03/20/2014US20140078821 Complementary decoding for non-volatile memory
03/20/2014US20140078819 Static random access memory cell with single-sided buffer and asymmetric construction
03/20/2014US20140078818 Static random access memory with ripple bit lines/search lines for imroving current leakage/variation tolerance and density/performance
03/20/2014US20140078817 Integrated circuits with sram cells having additional read stacks and methods for their fabrication
03/20/2014US20140078816 Signal processing circuit and method for driving the same
03/20/2014US20140078815 Voltage rail noise sensing circuit and method
03/20/2014US20140078808 Embedded Nonvolatile Memory Elements Having Resistive Switching Characteristics
03/20/2014US20140078807 Magnetic recording device and magnetic recording apparatus
03/20/2014US20140078806 Channel hot carrier tolerant tracking circuit for signal development on a memory sram
03/20/2014DE112012002662T5 6F2-DRAM-Zelle 6F2 DRAM cell
03/19/2014EP2709109A2 Non-volatile memory (NVM) with adaptive write operations
03/19/2014EP2707876A1 Co/Ni MULTILAYERS WITH IMPROVED OUT-OF-PLANE ANISOTROPY FOR MAGNETIC DEVICE APPLICATIONS
03/19/2014CN103650053A Spin-torque transfer magnetic memory cell structures with symmetric switching and single direction current programming
03/19/2014CN103650046A Short circuit reduction in a ferroelectric memory cell comprising a stack of layers arranged on a flexible substrate
03/19/2014CN103646666A Not or (NOR)-type content addressable memory
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