Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
09/2014
09/30/2014US8848440 Nonvolatile semiconductor memory device
09/30/2014US8848439 Threshold optimization for flash memory
09/30/2014US8848438 Asymmetric log-likelihood ratio for MLC flash channel
09/30/2014US8848437 Magnetic random access memory
09/30/2014US8848435 Magnetic resistance memory apparatus having multi levels and method of driving the same
09/30/2014US8848434 Magnetic resistance memory apparatus having multi levels and method of driving the same
09/30/2014US8848433 Nonvolatile memory device
09/30/2014US8848432 Magnetoresistive elements and memory devices including the same
09/30/2014US8848431 Magnetic field sensing using magnetoresistive random access memory (MRAM) cells
09/30/2014US8848430 Step soft program for reversible resistivity-switching elements
09/30/2014US8848429 Latch-based array with robust design-for-test (DFT) features
09/30/2014US8848428 Memory architectures having dense layouts
09/30/2014US8848427 Semiconductor intergrated circuit and operating method thereof
09/30/2014US8848426 Cross-point variable resistance nonvolatile memory device and reading method for cross-point variable resistance nonvolatile memory device
09/30/2014US8848425 Conductive metal oxide structures in non volatile re-writable memory devices
09/30/2014US8848424 Variable resistance nonvolatile memory device, and accessing method for variable resistance nonvolatile memory device
09/30/2014US8848423 Circuit and system of using FinFET for building programmable resistive devices
09/30/2014US8848422 Variable resistance nonvolatile memory device and driving method thereof
09/30/2014US8848421 Forming method of performing forming on variable resistance nonvolatile memory element, and variable resistance nonvolatile memory device
09/30/2014US8848420 Variable resistance memory device and data storage device including the same
09/30/2014US8848419 Sensing memory element logic states from bit line discharge rate that varies with resistance
09/30/2014US8848418 Semiconductor memory device
09/30/2014US8848412 Ternary content addressable memory
09/30/2014US8847982 Method and apparatus for generating an orthorectified tile
09/30/2014US8847361 Memory cell layout
09/25/2014WO2014153064A1 Precessional magnetization reversal in a magnetic tunnel junction with a perpendicular polarizer
09/25/2014WO2014151781A1 Eeprom memory cell with low voltage read path and high voltage erase/write path
09/25/2014WO2014151659A1 Method and apparatus for implementing wide data range and wide common-mode receivers
09/25/2014WO2014150815A2 System and method to dynamically determine a timing parameter of a memory device
09/25/2014WO2014150791A2 System and method of sensing a memory cell
09/25/2014WO2014150505A2 System and method of determining reading voltages of a data storage device
09/25/2014WO2014150487A2 System and method to regulate operating voltage of a memory array
09/25/2014WO2014150317A1 Three-dimensional (3d) memory cell with read/write ports and access logic on different tiers of the integrated circuit
09/25/2014WO2014149504A1 Dual-port static random access memory (sram)
09/25/2014WO2014149093A1 Circuit for generating negative bitline voltage
09/25/2014WO2014148640A1 Semiconductor device and method for driving semiconductor device
09/25/2014WO2014148405A1 Resistance change memory
09/25/2014WO2014148404A1 Semiconductor memory device
09/25/2014WO2014148403A1 Nonvolatile random access memory
09/25/2014WO2014148402A1 Resistance change memory
09/25/2014WO2014148372A1 Semiconductor device
09/25/2014WO2014146489A1 Dram self-refresh method
09/25/2014US20140289461 Information processing system including semiconductor device having self-refresh mode
09/25/2014US20140289460 Systems and methods involving data bus inversion memory circuitry, configuration and/or operation including data signals grouped into 10 bits and/or other features
09/25/2014US20140289440 Systems and methods involving data bus inversion memory circuitry, configuration and/or operation
09/25/2014US20140286389 Multiphase Receiver with Equalization Circuitry
09/25/2014US20140286118 Semiconductor device verifying signal supplied from outside
09/25/2014US20140286109 Semiconductor device including output circuit constituted of plural unit buffer circuits in which impedance thereof are adjustable
09/25/2014US20140286088 Memory device
09/25/2014US20140286087 Semiconductor memory device
09/25/2014US20140286086 Semiconductor memory device
09/25/2014US20140286085 Power supply circuit and protection circuit
09/25/2014US20140286084 Magnetoresistive element
09/25/2014US20140286078 Resistance change memory
09/25/2014DE102004060579B4 Verfahren und Vorrichtung zum Steuern von Auffrischzyklen eines Mehrzyklusauffrischschemas bei einem dynamischen Speicher Method and apparatus for controlling a refresh of a dynamic memory in Mehrzyklusauffrischschemas
09/25/2014DE102004017863B4 Schaltung und Verfahren zum Ermitteln eines Referenzpegels für eine solche Schaltung Circuit and method for determining a reference level for such a circuit
09/24/2014EP2782100A2 Memory to read and write data at a magnetic tunnel junction element
09/24/2014EP2780912A1 Non-volatile storage with broken word line screen and data recovery
09/23/2014US8843702 Device, system, and method of memory allocation
09/23/2014US8842487 Power management domino SRAM bit line discharge circuit
09/23/2014US8842482 Programmable memory with skewed replica and redundant bits for reset control
09/23/2014US8842476 Erratic program detection for non-volatile storage
09/23/2014US8842475 Configuration memory
09/23/2014US8842471 Charge cycling by equalizing and regulating the source, well, and bit line levels during write operations for NAND flash memory: program to verify transition
09/23/2014US8842469 Method for programming a multi-state non-volatile memory (NVM)
09/23/2014US8842468 Load and short current measurement by current summation technique
09/23/2014US8842467 Magnetic random access memory apparatus, methods for programming and verifying reference cells therefor
09/23/2014US8842466 Magnentic resistance memory apparatus having multi levels and method of driving the same
09/23/2014US8842465 Memory element and memory apparatus
09/23/2014US8842464 Static random access memory device including negative voltage level shifter
09/23/2014US8842463 Storage apparatus and operation method for operating the same
09/23/2014US8842462 Resistive random access memory device and operating method thereof
09/23/2014US8842461 Phase change memory device having multi-level and method of driving the same
09/23/2014US8842460 Method for improving data retention in a 2T/2C ferroelectric memory
09/23/2014US8842459 Semiconductor device
09/23/2014US8842457 Semiconductor memory device, method of controlling read preamble signal thereof, and data transmission system
09/23/2014US8841648 Multi-level memory arrays with memory cells that employ bipolar storage elements and methods of forming the same
09/23/2014US8841645 Multi-level memory cell
09/23/2014US8841006 Magnetic tunnel junction device and method for manufacturing the same
09/18/2014WO2014146002A2 Proximity sensing device control architecture and data communication protocol
09/18/2014WO2014145472A2 A method for treating neurodegeneration using a p38mapk inhibitor
09/18/2014WO2014143016A1 Integrated capacitor based power distribution
09/18/2014WO2014142978A1 Logic chip including embedded magnetic tunnel junctions
09/18/2014WO2014142956A1 Logic chip including embedded magnetic tunnel junctions
09/18/2014WO2014142922A1 Cross point array mram having spin hall mtj devices
09/18/2014WO2014142332A1 Method for driving semiconductor device and semiconductor device
09/18/2014WO2014142254A1 Semiconductor storage device and system provided with same
09/18/2014WO2014142043A1 Method for driving semiconductor device and semiconductor device
09/18/2014US20140281824 Nonvolatile memory device and data write method
09/18/2014US20140281207 Techniques for Determining Victim Row Addresses in a Volatile Memory
09/18/2014US20140281206 Techniques for Probabilistic Dynamic Random Access Memory Row Repair
09/18/2014US20140281203 Managing disturbance induced errors
09/18/2014US20140281202 Dram controller for variable refresh operation timing
09/18/2014US20140281201 Refresh control device, wireless receiver, and semiconductor integrated circuit
09/18/2014US20140281200 Memory devices and systems including multi-speed access of memory modules
09/18/2014US20140281199 Optical interconnect in high-speed memory systems
09/18/2014US20140281195 Method and a system to verify shared memory integrity
09/18/2014US20140269139 Hidden refresh of weak memory storage cells in semiconductor memory
09/18/2014US20140269134 Memory device and method of controlling refresh operation in memory device
09/18/2014US20140269133 Background Auto-refresh Apparatus and Method for Non-Volatile Memory Array
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