| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 06/29/1999 | US5917342 On a semiconductor substrate |
| 06/29/1999 | US5917341 Low-side physical interface driver circuit for microcomputer date transmission applications |
| 06/29/1999 | US5917340 Twisted-pair driver with staggered differential drivers and glitch free binary to multi level transmit encoder |
| 06/29/1999 | US5917339 For managing mixed voltages in a semiconductor device |
| 06/29/1999 | US5917337 Programmable I/O cell with data conversion capability |
| 06/29/1999 | US5917335 Output voltage controlled impedance output buffer |
| 06/29/1999 | US5917220 Integrated circuit with improved overvoltage protection |
| 06/24/1999 | WO1999031804A1 Bus-hold circuit having a defined state during set-up of an in-system programmable device |
| 06/24/1999 | WO1999031803A1 Clocking in electronic circuits |
| 06/24/1999 | WO1999031802A1 Output driver circuit with jump start for current sink on demand |
| 06/24/1999 | WO1999031801A1 Method of biasing an mos ic to operate at the zero temperature coefficient point |
| 06/23/1999 | EP0924859A1 Self-clocked logic circuit and methodology |
| 06/23/1999 | CN1043822C Compact fall safe interface and voting module comprising it |
| 06/23/1999 | CA2256873A1 Optical window signal generator |
| 06/22/1999 | US5915121 Integrated circuit configuration for reducing current consumption |
| 06/22/1999 | US5915017 Method for use with an integrated circuit programmable logic device |
| 06/22/1999 | US5914906 Field programmable memory array |
| 06/22/1999 | US5914867 Voltage generator-booster for supplying a pulsating voltage having approximately constant voltage levels |
| 06/22/1999 | US5914844 Overvoltage-tolerant input-output buffers having a switch configured to isolate a pull up transistor from a voltage supply |
| 06/22/1999 | US5914627 Isolation circuit for I/O terminal |
| 06/22/1999 | US5914625 Clock driver circuit and semiconductor integrated circuit device |
| 06/22/1999 | US5914624 Skew logic circuit device |
| 06/22/1999 | US5914618 Optimum noise isolated I/O with minimized footprint |
| 06/22/1999 | US5914617 Output driver for sub-micron CMOS |
| 06/22/1999 | US5914616 FPGA repeatable interconnect structure with hierarchical interconnect lines |
| 06/17/1999 | WO1999030419A1 Buffer circuit |
| 06/17/1999 | WO1999030236A1 TEST CIRCUITRY FOR ASICs |
| 06/15/1999 | US5912581 Spurious-emission-reducing terminal configuration for an integrated circuit |
| 06/15/1999 | US5912577 Level shift circuit |
| 06/15/1999 | US5912573 Synchronizing clock pulse generator for logic derived clock signals for a programmable device |
| 06/15/1999 | US5912572 Synchronizing clock pulse generator for logic derived clock signals with synchronous clock suspension capability for a programmable device |
| 06/15/1999 | US5912570 Application specific integrated circuit (ASIC) having improved reset deactivation |
| 06/15/1999 | US5912569 Methods, circuits and devices for improving crossover performance and/or monotonicity, and applications of the same in a universal serial bus (USB) low speed output driver |
| 06/15/1999 | US5912563 Trinary signal apparatus and method |
| 06/09/1999 | EP0921639A1 Dynamic logic gate with relaxed timing requirements and output state holding |
| 06/09/1999 | EP0921638A2 Bus driver circuit |
| 06/09/1999 | CN1219030A Level shifting circuit capable of operation in low power voltage |
| 06/09/1999 | CN1219015A Integrated semiconductor circuit with at least two power supply network |
| 06/08/1999 | US5910924 Semiconductor integrated circuit including voltage converter effective at low operational voltages |
| 06/08/1999 | US5910901 Logic simulator |
| 06/08/1999 | US5910735 Method and apparatus for safe mode in dynamic logic using dram cell |
| 06/08/1999 | US5910734 Voltage level translator |
| 06/08/1999 | US5910732 Programmable gate array having shared signal lines for interconnect and configuration |
| 06/08/1999 | US5910730 For accepting multiple logic signals |
| 06/03/1999 | WO1999012212A3 Lone-electron circuit arrangement, operating mode, and application for adding binary numbers |
| 06/02/1999 | EP0920134A2 Interface circuit |
| 06/02/1999 | EP0920133A1 Output amplifier for an integrated circuit |
| 06/02/1999 | EP0920132A1 Tristate output circuit |
| 06/02/1999 | EP0919983A2 Data line drive with charge recovery circuit |
| 06/02/1999 | EP0919938A2 Optimized emulation and prototyping architecture |
| 06/02/1999 | EP0919916A2 Embedded logic analyzer |
| 06/02/1999 | EP0919891A2 Device and method to adapt output drivers of integrated circuits to given situations |
| 06/02/1999 | DE19807393C1 Signal transmission method between circuits with different operating potentials |
| 06/02/1999 | DE19755130C1 Pufferschaltung Buffer circuit |
| 06/01/1999 | US5909140 Circuit for controlling the threshold voltage in a semiconductor device |
| 06/01/1999 | US5909135 High-side MOSFET gate protection shunt circuit |
| 06/01/1999 | US5909128 FETs logic circuit |
| 06/01/1999 | US5909127 Electrical device |
| 06/01/1999 | US5909126 Programmable logic array integrated circuit devices with interleaved logic array blocks |
| 06/01/1999 | US5909125 FPGA using RAM control signal lines as routing or logic resources after configuration |
| 06/01/1999 | CA2137340C Exclusive or logic gate tree and frequency multiplier incorporating said tree |
| 05/27/1999 | WO1999026343A1 A programmable logic device with versatile exclusive or architecture |
| 05/27/1999 | WO1999026342A1 Voltage tolerant buffer |
| 05/27/1999 | WO1999026340A1 Zero-delay slew-rate controlled output buffer |
| 05/27/1999 | CA2278475A1 Zero-delay slew-rate controlled output buffer |
| 05/26/1999 | CN1217578A Semiconductor device of complementary metal oxide |
| 05/25/1999 | US5907697 Emulation system having a scalable multi-level multi-stage hybrid programmable interconnect network |
| 05/25/1999 | US5907539 I/O Module for a serial multiplex data system with a programmable communication mode selector |
| 05/25/1999 | US5907251 Low voltage swing capacitive bus driver device |
| 05/25/1999 | US5907249 Voltage tolerant input/output buffer |
| 05/25/1999 | US5907248 FPGA interconnect structure with high-speed high fanout capability |
| 05/20/1999 | WO1998058383A9 Electrically addressable passive device, method for electrical addressing of the same and uses of the device and the method |
| 05/20/1999 | DE19823477A1 Inverter circuit, especially for output driver stage |
| 05/19/1999 | WO1999026369A1 Device for generating a plurality of code series simultaneously and cdma radio receiver comprising the device |
| 05/19/1999 | EP0917201A2 Complementary MOS semiconductor device |
| 05/19/1999 | EP0916187A1 Voltage controlled variable current reference |
| 05/19/1999 | CN1216880A Delay circuit |
| 05/18/1999 | US5905621 Voltage scaling circuit for protecting an input node to a protected circuit |
| 05/18/1999 | US5905618 Output driver apparatus |
| 05/18/1999 | US5905401 Device and method for limiting the extent to which circuits in integrated circuit dice electrically load bond pads and other circuit nodes in the dice |
| 05/18/1999 | US5905399 CMOS integrated circuit regulator for reducing power supply noise |
| 05/18/1999 | US5905394 Latch circuit |
| 05/18/1999 | US5905389 Methods, circuits and devices for improving crossover performance and/or monotonicity, and applications of the same in a universal serial bus (USB) low speed output driver |
| 05/18/1999 | US5905386 CMOS SONET/ATM receiver suitable for use with pseudo ECL and TTL signaling environments |
| 05/18/1999 | US5905385 Memory bits used to couple look up table inputs to facilitate increased availability to routing resources particularly for variable sized look up tables for a field programmable gate array (FPGA) |
| 05/18/1999 | US5905282 Multi-terminal surge protection device |
| 05/14/1999 | WO1999008325A3 Electrode means, with or without functional elements and an electrode device formed of said means |
| 05/12/1999 | CN1216417A Continuous parallel data transmission circuit |
| 05/11/1999 | US5903607 Method and device for encoding and transmitting bidirectional data from a master circuit to a slave circuit |
| 05/11/1999 | US5903510 Address decoder, semiconductor memory and semiconductor device |
| 05/11/1999 | US5903503 Computer system |
| 05/11/1999 | US5903501 Semiconductor device with 3V/5V tolerant output driver |
| 05/11/1999 | US5903490 Customizable integrated circuit device |
| 05/11/1999 | US5903179 Data-outputting buffer circuit |
| 05/11/1999 | US5903175 D-type latch circuit and device using the same |
| 05/11/1999 | US5903174 Method and apparatus for reducing skew among input signals within an integrated circuit |
| 05/11/1999 | US5903170 Digital logic design using negative differential resistance diodes and field-effect transistors |
| 05/11/1999 | US5903169 Charge recycling differential logic (CRDL) circuit and storage elements and devices using the same |
| 05/11/1999 | US5903168 For a multi-chip module |
| 05/11/1999 | US5903167 For coupling a component to a transmission line |