| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
|---|
| 07/27/1999 | US5929688 Level converter |
| 07/27/1999 | US5929687 Signal transmitting circuit, signal receiving circuit, signal transmitting/receiving circuit, signal transmitting method, signal receiving method signal transmitting/receiving method, semiconductor integrated circuit, and control method thereof |
| 07/27/1999 | US5929686 Semiconductor device with boot-strap output circuit and clamping circuit |
| 07/27/1999 | US5929680 To reduce short circuit current in the buffer circuit output stage |
| 07/27/1999 | US5929679 Buffering circuit |
| 07/27/1999 | US5929669 Output buffer circuit for semiconductor memory devices |
| 07/27/1999 | US5929668 Data output buffer circuit |
| 07/27/1999 | US5929667 Method and apparatus for protecting circuits subjected to high voltage |
| 07/27/1999 | US5929666 Bootstrap circuit |
| 07/27/1999 | US5929654 Temperature-insensitive current controlled CMOS output driver |
| 07/27/1999 | US5929653 Semiconductor integrated circuit having programmable enabling circuit |
| 07/22/1999 | WO1999037027A1 A driver circuit for low voltage operation of a successive approximation register (sar) analog to digital (a/d) converter and method therefor |
| 07/22/1999 | DE19811353C1 Circuit arrangement for reducing leakage current |
| 07/21/1999 | CN1223501A Data shifting assembly |
| 07/21/1999 | CN1223412A Semiconductor IC |
| 07/20/1999 | US5926430 Semiconductor integrated circuit device and method of activating the same |
| 07/20/1999 | US5926396 Logic synthesis method, semiconductor integrated circuit and arithmetic circuit |
| 07/20/1999 | US5926353 For a mixed digital and analog signal integrated circuit |
| 07/20/1999 | US5926057 Semiconductor device, circuit having the device, and correlation calculation apparatus, signal converter, and signal processing system utilizing the circuit |
| 07/20/1999 | US5926056 Voltage tolerant output buffer |
| 07/20/1999 | US5926055 Five volt output connection for a chip manufactured in a three volt process |
| 07/20/1999 | US5926050 Separate set/reset paths for time critical signals |
| 07/20/1999 | US5926049 Low power CMOS line driver with dynamic biasing |
| 07/20/1999 | US5926043 Output circuit for a semiconductor device |
| 07/20/1999 | US5926040 Logic circuit |
| 07/20/1999 | US5926039 Active load for an N channel logic network |
| 07/20/1999 | US5926038 High speed, performance |
| 07/20/1999 | US5926037 Buffer circuit which transfers data held in a first latch circuit to a second latch circuit |
| 07/20/1999 | US5926036 Programmable logic array circuits comprising look up table implementation of fast carry adders and counters |
| 07/20/1999 | US5926035 Method and apparatus to generate mask programmable device |
| 07/20/1999 | US5926034 Fuse option for multiple logic families on the same die |
| 07/20/1999 | US5925920 Techniques and circuits for high yield improvements in programmable devices using redundant routing resources |
| 07/15/1999 | WO1999035545A1 Output buffer having a predriver for compensating slew rate against process variations |
| 07/15/1999 | DE19900859A1 CMOS circuit with CMOS components operable by low power |
| 07/15/1999 | DE19900337A1 Difference signal transmission circuit |
| 07/15/1999 | CA2283584A1 Output buffer having a predriver for compensating slew rate against process variations |
| 07/14/1999 | EP0929154A1 Annihilation based logic gates for high fanin functions |
| 07/14/1999 | EP0702812B1 Cmos bus and transmission line receiver |
| 07/13/1999 | US5923830 Non-interrupting power control for fault tolerant computer systems |
| 07/13/1999 | US5923614 Structure and method for reading blocks of data from selectable points in a memory device |
| 07/13/1999 | US5923570 Clock wiring design method for integrated circuit |
| 07/13/1999 | US5923202 Input/output overvoltage containment circuit for improved latchup protection |
| 07/13/1999 | US5923198 High-speed clock-synchronous semiconductor integrated circuit and semiconductor integrated circuit system |
| 07/13/1999 | US5923195 Fast clock generator and clock synchronizer for logic derived clock signals with synchronous clock suspension capability for a programmable device |
| 07/13/1999 | US5923194 Fast clock generator and clock synchronizer for logic derived clock signals for a programmable device |
| 07/13/1999 | US5923192 CMOS circuit |
| 07/13/1999 | US5923189 Semiconductor integrated circuit comprised of pass-transistor circuits with different mutual connections |
| 07/13/1999 | US5923185 Logic circuit programmable to implement at least two logic functions |
| 07/13/1999 | US5923184 Ferroelectric transistor logic functions for programming |
| 07/13/1999 | US5923183 CMOS output buffer circuit exhibiting reduced switching noise |
| 07/13/1999 | US5923069 Voltage level detecting circuit |
| 07/08/1999 | WO1999034515A1 Electrically erasable and reprogrammable, nonvolatile integrated storage device with in-system programming and verification (ispav) capabilities for supporting in-system reconfiguring of pld's |
| 07/08/1999 | WO1999034514A1 Logic circuit |
| 07/08/1999 | WO1999034513A1 High speed ratioed cmos logic structures for a pulsed input |
| 07/08/1999 | WO1999034512A1 Semiconductor integrated circuit device, recording medium stored with cell library, and method for designing semiconductor integrated circuit |
| 07/08/1999 | WO1999034511A1 Differential, mixed swing, tristate driver circuit for high performance and low power on-chip interconnects |
| 07/08/1999 | WO1999008325A8 Electrode means, with or without functional elements and an electrode device formed of said means |
| 07/08/1999 | DE19842458A1 Level converter used by A/D converter |
| 07/07/1999 | EP0928101A2 CMOS area array sensors |
| 07/07/1999 | EP0928069A2 Self-resetting dynamic logic circuits and method for resetting the same |
| 07/07/1999 | EP0928068A1 Low consumption TTL-CMOS input buffer stage |
| 07/07/1999 | EP0858688A4 Esd protection for overvoltage friendly input/output circuits |
| 07/07/1999 | EP0702861B1 Voltage translation and overvoltage protection |
| 07/07/1999 | EP0578821B1 Semiconductor device |
| 07/06/1999 | US5920729 Apparatus for providing pair of complementary outputs with first and subcircuits to convert non-complementary and complementary inputs to first and second pair of complementary output |
| 07/06/1999 | US5920498 Compression circuit of an adder circuit |
| 07/06/1999 | US5920227 Zero current draw circuit for use during a bonding option |
| 07/06/1999 | US5920213 Pulse discriminating clock synchronizer for logic derived clock signals for a programmable device |
| 07/06/1999 | US5920210 Inverter-controlled digital interface circuit with dual switching points for increased speed |
| 07/06/1999 | US5920206 Differential ECL |
| 07/06/1999 | US5920205 Loading element for a logic gate |
| 07/06/1999 | US5920204 On/off control for a balanced differential current mode driver |
| 07/06/1999 | US5920203 Logic driven level shifter |
| 07/06/1999 | US5920202 Configurable logic element with ability to evaluate five and six input functions |
| 07/06/1999 | US5920089 Multi-power supply integrated circuit and system employing the same |
| 07/06/1999 | US5919500 Enzyme extraction process for tea |
| 07/01/1999 | WO1999033177A1 Symmetrical, extended and fast direct connections between variable grain blocks in fpga integrated circuits |
| 06/30/1999 | EP0926831A2 Pass transistor circuit |
| 06/30/1999 | EP0926830A2 Level conversion circuit and semiconductor integrated circuit employing the same |
| 06/30/1999 | EP0926829A1 Output circuit for digital integrated circuit devices |
| 06/30/1999 | EP0926828A1 Semiconductor integrated circuit |
| 06/30/1999 | EP0926827A1 Integrated circuit with at least two power supply voltages |
| 06/30/1999 | EP0926825A2 Static latch circuit and static logic circuit |
| 06/30/1999 | EP0925650A1 Three state switch detection using current sensing |
| 06/30/1999 | EP0925649A1 Fpga architecture having ram blocks with programmable word length and width and dedicated address and data lines |
| 06/30/1999 | CN1221257A Static latch circuit and static logic circuit |
| 06/30/1999 | CN1221256A Constant current CMOS output driver circuit with dual gate transistor devices |
| 06/30/1999 | CN1221217A Output buffer circuit having variable output impedance |
| 06/30/1999 | CN1221206A Level conversion circuit and semiconductor integrated circuit device employing level conversion circuit |
| 06/29/1999 | US5917747 Digital memory element |
| 06/29/1999 | US5917742 Semiconductor arithmetic circuit |
| 06/29/1999 | US5917365 Optimizing the operating characteristics of a CMOS integrated circuit |
| 06/29/1999 | US5917364 Bi-directional interface circuit of reduced signal alteration |
| 06/29/1999 | US5917361 Method and apparatus for reducing noise in an output buffer |
| 06/29/1999 | US5917360 Differential current-switch circuit, D/A conversion circuit and method of transient response reduction |
| 06/29/1999 | US5917359 Semiconductor apparatus having protective circuitry |
| 06/29/1999 | US5917358 Method and output buffer with programmable bias to accommodate multiple supply voltages |
| 06/29/1999 | US5917350 Asynchronous pulse discriminating synchronizing clock pulse generator with synchronous clock suspension capability for logic derived clock signals for a programmable device |
| 06/29/1999 | US5917348 CMOS bidirectional buffer for mixed voltage applications |
| 06/29/1999 | US5917343 MOS inverter circuit |