| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 07/24/2001 | US6266785 File system filter driver apparatus and method |
| 07/24/2001 | US6266722 Multi-value logic device, bus system of multi-value logic devices connected with shared bus, and network system of information processors loaded with multi-value logic devices and connected with shared network |
| 07/24/2001 | US6266284 Output buffer for external voltage |
| 07/24/2001 | US6265931 Voltage reference source for an overvoltage-tolerant bus interface |
| 07/24/2001 | US6265926 Programmable PCI overvoltage input clamp |
| 07/24/2001 | US6265923 Dual rail dynamic flip-flop with single evaluation path |
| 07/24/2001 | US6265914 Predriver for high frequency data transceiver |
| 07/24/2001 | US6265913 Load driving circuits having adjustable output drive capability |
| 07/24/2001 | US6265909 Three-valued switching circuit |
| 07/24/2001 | US6265907 Signal transmission circuit having intermediate amplifier circuit |
| 07/24/2001 | US6265900 High speed logical or circuit |
| 07/24/2001 | US6265899 Single rail domino logic for four-phase clocking scheme |
| 07/24/2001 | US6265898 Current mode logic gates for low-voltage high speed applications |
| 07/24/2001 | US6265897 Contention based logic gate driving a latch and driven by pulsed clock |
| 07/24/2001 | US6265895 Programmable logic device incorporating a memory efficient interconnection device |
| 07/24/2001 | US6265894 Reconfigurable integrated circuit with integrated debugging facilities for use in an emulation system |
| 07/24/2001 | US6265893 Signal line drivers |
| 07/19/2001 | US20010008491 Semiconductor device with dram and logic part integrated |
| 07/19/2001 | US20010008381 Level shift circuit and image display device |
| 07/19/2001 | US20010008379 Programmable integrated circuit device |
| 07/18/2001 | EP1116327A1 Input circuit for an output stage |
| 07/18/2001 | EP1116141A1 A regionally time multiplexed emulation system |
| 07/18/2001 | EP1116129A2 Configurable hardware block |
| 07/18/2001 | EP1116107A1 Method for executing individual algorithms by means of a reconfigurable circuit and device for carrying out such a method |
| 07/18/2001 | EP1057255B1 Method and circuitry for the transmission of signals |
| 07/18/2001 | EP0701713B1 Field programmable logic device with dynamic interconnections to a dynamic logic core |
| 07/17/2001 | US6263482 Programmable logic device having macrocells with selectable product-term inversion |
| 07/17/2001 | US6263430 Method of time multiplexing a programmable logic device |
| 07/17/2001 | US6262908 Field programmable processor devices |
| 07/17/2001 | US6262617 Integrated circuit output driver |
| 07/17/2001 | US6262615 Dynamic logic circuit |
| 07/17/2001 | US6262607 Output buffer circuit |
| 07/17/2001 | US6262606 Waveform compensated output driver |
| 07/17/2001 | US6262601 Inverter for high voltage full swing output |
| 07/17/2001 | US6262599 Level shifting CMOS I/O buffer |
| 07/17/2001 | US6262598 Voltage level shifter |
| 07/17/2001 | US6262597 FIFO in FPGA having logic elements that include cascadable shift registers |
| 07/17/2001 | US6262595 High-speed programmable interconnect |
| 07/17/2001 | US6262594 Apparatus and method for configurable use of groups of pads of a system on chip |
| 07/17/2001 | US6262593 Semi-dynamic and dynamic threshold gates with modified pull-up structures |
| 07/12/2001 | WO2001050607A1 Programmable logic device with configurable function cells to perform boolean and arithmetic |
| 07/12/2001 | WO2001050606A1 Carry lookahead for programmable logic array |
| 07/12/2001 | WO2001050605A1 Circuit and method for input to failsafe 'and' gate |
| 07/12/2001 | WO2001050604A1 Vital 'and' gate apparatus and method |
| 07/12/2001 | WO2001050532A1 Self-configurable parallel processing system made from self-dual code/data processing cells utilizing a non-shifting memory |
| 07/12/2001 | US20010007434 Double input buffer for track-and-hold amplifier |
| 07/12/2001 | US20010007428 Interconnect structure for a programmable logic device |
| 07/12/2001 | DE10064103A1 Halbleiterschaltung mit Ausgangspufferschaltung und Treiberschaltung zum Treiben einer Ausgangspufferschaltung Semiconductor circuit with output buffer circuit and driver circuit for driving an output buffer circuit |
| 07/12/2001 | CA2396060A1 Circuit and method for input to failsafe "and" gate |
| 07/11/2001 | EP1115067A2 Bus system driver |
| 07/11/2001 | EP1114514A1 Very fine grain field programmable gate array architecture and circuitry |
| 07/11/2001 | EP0601094B1 Programme logic cell and array |
| 07/10/2001 | US6260185 Method for designing semiconductor integrated circuit and automatic designing device |
| 07/10/2001 | US6260087 Embedded configurable logic ASIC |
| 07/10/2001 | US6259588 Input/output buffer with overcurrent protection circuit |
| 07/10/2001 | US6259303 Wave shaping circuit |
| 07/10/2001 | US6259299 CMOS level shift circuit for integrated circuits |
| 07/10/2001 | US6259282 External pull-up resistor detection and compensation of output buffer |
| 07/10/2001 | US6259276 Semiconductor integrated circuit |
| 07/10/2001 | US6259275 Logic gate having reduced power dissipation and method of operation thereof |
| 07/10/2001 | US6259273 Programmable logic device with mixed mode programmable logic array |
| 07/10/2001 | US6259272 Programmable logic array integrated circuit architectures |
| 07/10/2001 | US6259271 Configuration memory integrated circuit |
| 07/05/2001 | WO2001048925A1 Circuitry and method for removing glitches in digital circuits |
| 07/05/2001 | WO2001048823A1 An integrated circuit with metal programmable logic having enhanced reliability |
| 07/05/2001 | WO2001048759A1 Double input buffer for track-and-hold amplifier |
| 07/05/2001 | US20010006352 Metal oxide semiconductor transistor circuit and semiconductor integrated circuit using the same |
| 07/05/2001 | US20010006348 Programmable logic device architectures |
| 07/05/2001 | US20010006347 Redundancy circuitry for programmable logic devices with interleaved input circuits |
| 07/05/2001 | US20010006243 Input-output protection device for semiconductor integrated circuit |
| 07/05/2001 | DE19960243A1 Bussystem Bus system |
| 07/04/2001 | EP1113452A2 Internal protection circuit and method for on chip programmable poly fuses |
| 07/04/2001 | EP1095452A4 A cmos driver |
| 07/04/2001 | CN2438273Y Circuit for testing mains voltage across points |
| 07/03/2001 | US6256234 Low skew differential receiver with disable feature |
| 07/03/2001 | US6255888 Level shift circuit |
| 07/03/2001 | US6255874 Transistor channel width and slew rate correction circuit and method |
| 07/03/2001 | US6255870 Apparatus for compensating locking error in high speed memory device with delay locked loop |
| 07/03/2001 | US6255868 Buffer circuit and hold circuit |
| 07/03/2001 | US6255867 CMOS output buffer with feedback control on sources of pre-driver stage |
| 07/03/2001 | US6255859 High speed source synchronous signaling for interfacing VLSI CMOS circuits to transmission lines |
| 07/03/2001 | US6255857 Signal level shifting circuits |
| 07/03/2001 | US6255855 Integrated circuit having a decoder |
| 07/03/2001 | US6255854 Feedback stage for protecting a dynamic node in an integrated circuit having dynamic logic |
| 07/03/2001 | US6255853 Integrated circuit having dynamic logic with reduced standby leakage current |
| 07/03/2001 | US6255851 Multi-voltage I/O buffer clamping circuit |
| 07/03/2001 | US6255850 Integrated circuit with both clamp protection and high impedance protection from input overshoot |
| 07/03/2001 | US6255849 On-chip self-modification for PLDs |
| 07/03/2001 | US6255848 Method and structure for reading, modifying and writing selected configuration memory cells of an FPGA |
| 07/03/2001 | US6255847 Programmable logic device |
| 07/03/2001 | US6255846 Programmable logic devices with enhanced multiplexing capabilities |
| 07/03/2001 | US6255845 Efficient use of spare gates for post-silicon debug and enhancements |
| 06/28/2001 | WO2001047121A1 High voltage buffer for submicron cmos |
| 06/28/2001 | WO2001047120A2 Programmable buffer circuit |
| 06/28/2001 | WO2001047119A1 Low-power signal driver with low harmonic content |
| 06/28/2001 | WO2001047116A1 Dual pseudo reference voltage generation for receivers |
| 06/28/2001 | WO2001047111A2 Capacitively coupled re-referencing circuit with positive feedback |
| 06/28/2001 | WO2001046988A2 Method and apparatus for routing 1 of n signals |
| 06/28/2001 | WO2001046704A2 A differential, low voltage swing reducer |
| 06/28/2001 | WO2001039251A9 High performance output buffer with esd protection |