| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 08/21/2001 | US6278293 Circuit and method for a transistor-transistor logic (TTL) compatible output drive |
| 08/21/2001 | US6278292 Intergrated circuit |
| 08/21/2001 | US6278291 Programmable logic array devices with interconnect lines of various lengths |
| 08/21/2001 | US6278290 Method and circuit for operating programmable logic devices during power-up and stand-by modes |
| 08/21/2001 | US6278288 Programmable logic device with enhanced multiplexing capabilities in interconnect resources |
| 08/21/2001 | US6278287 Isolated well transistor structure for mitigation of single event upsets |
| 08/21/2001 | US6278157 Method and apparatus for elimination of parasitic bipolar action in logic circuits including complementary oxide semiconductor (CMOS) silicon on insulator (SOI) elements |
| 08/16/2001 | WO2001059629A1 Supporting multiple fpga configuration modes using dedicated on-chip processor |
| 08/16/2001 | WO2000077977A3 Pass-driver circuit for a two-conductor bus-system |
| 08/16/2001 | US20010013810 Differential amplifier circuit |
| 08/16/2001 | US20010013806 Semiconductor integrated circuit |
| 08/16/2001 | US20010013797 Logic cell and logic circuit using the same |
| 08/16/2001 | US20010013796 Clock gate buffering circuit |
| 08/16/2001 | US20010013795 Level shifter |
| 08/16/2001 | US20010013794 Buffer circuit |
| 08/16/2001 | US20010013793 Programmable logic device incorporating function blocks operable as wide-shallow ram |
| 08/16/2001 | EP1124331A2 Semiconductor circuit arrangement having a bus system and an adjustment system for adapting signal time constants |
| 08/16/2001 | EP1123556A1 Fuse circuit having zero power draw for partially blown condition |
| 08/16/2001 | DE10105044A1 Schaltung mit variabler Basissteuerung und geringem Stromverbrauch Variable circuit based control and low power consumption |
| 08/16/2001 | DE10101066A1 Treiberschaltung, Empfangsschaltung und Signalübertragungs-Bussystem Driver circuit, receiver circuit and signal transmission bus system |
| 08/14/2001 | US6275842 Low power multiplier for CPU and DSP |
| 08/14/2001 | US6275841 1-of-4 multiplier |
| 08/14/2001 | US6275838 Method and apparatus for an enhanced floating point unit with graphics and integer capabilities |
| 08/14/2001 | US6275440 Semiconductor integrated circuit device and method of activating the same |
| 08/14/2001 | US6275394 Input circuit |
| 08/14/2001 | US6275107 Differential amplifier circuit and pull up-type differential driver |
| 08/14/2001 | US6275094 CMOS device and circuit and method of operation dynamically controlling threshold voltage |
| 08/14/2001 | US6275088 Method and apparatus for dynamic impedance clamping of a digital signal delivered over a transmission line |
| 08/14/2001 | US6275085 Comparator for determining process variations |
| 08/14/2001 | US6275083 Low operational power, low leakage power D-type flip-flop |
| 08/14/2001 | US6275078 Self-adjustable impendance line driver |
| 08/14/2001 | US6275077 Method and apparatus for programmable adjustment of bus driver propagation times |
| 08/14/2001 | US6275071 Domino logic circuit and method |
| 08/14/2001 | US6275069 Self-resetting logic circuits and method of operation thereof |
| 08/14/2001 | US6275066 Current-mode bidirectional input/output buffer for impedance matching |
| 08/14/2001 | US6275065 Programmable logic integrated circuit architecture incorporating a lonely register |
| 08/14/2001 | US6275064 Symmetrical, extended and fast direct connections between variable grain blocks in FPGA integrated circuits |
| 08/14/2001 | US6275063 Method and apparatus for limited reprogrammability of fuse options using one-time programmable elements |
| 08/09/2001 | US20010013075 Driver circuit, receiver circuit, and signal transmission bus system |
| 08/09/2001 | US20010012190 Input stage protection circuit for a receiver |
| 08/09/2001 | US20010011918 Semiconductor integrated circuit device |
| 08/09/2001 | US20010011911 Input buffer circuit for semiconductor device |
| 08/09/2001 | US20010011910 Level conversion circuit and semiconductor integrated circuit device employing the level conversion circuit |
| 08/09/2001 | US20010011908 Multi-dimensional programmable input selection apparatus and method |
| 08/09/2001 | US20010011905 Semiconductor integrated circuit device and testing method therefor |
| 08/09/2001 | DE10037478C1 EXOR-Schaltung EXOR circuit |
| 08/08/2001 | EP1122923A2 Line driver with transformer coupling and impedance control |
| 08/08/2001 | EP1122922A1 Line driver with adaptive output impedance |
| 08/08/2001 | EP1122888A1 Logic cell and logic circuit using the same |
| 08/08/2001 | EP0867071B1 A bus driver circuit configured to partially discharge a bus conductor to decrease line to line coupling capacitance |
| 08/08/2001 | CN1307748A Multiple-valued logic circuit arthitecture: supplementary symmetrical logic circuit structure (SUS-LOG) |
| 08/07/2001 | US6272657 Apparatus and method for progammable parametric toggle testing of digital CMOS pads |
| 08/07/2001 | US6272646 Programmable logic device having an integrated phase lock loop |
| 08/07/2001 | US6271713 Dynamic threshold source follower voltage driver circuit |
| 08/07/2001 | US6271710 Temperature dependent circuit, and current generating circuit, inverter and oscillation circuit using the same |
| 08/07/2001 | US6271707 Level shifter |
| 08/07/2001 | US6271705 Data output circuits having enhanced ESD resistance and related methods |
| 08/07/2001 | US6271703 Fast overvoltage protected pad input circuit |
| 08/07/2001 | US6271692 Semiconductor integrated circuit |
| 08/07/2001 | US6271686 Method for elimination of parasitic bipolar action in silicon on insulator (SOI) dynamic logic circuits |
| 08/07/2001 | US6271685 Semiconductor integrated circuit |
| 08/07/2001 | US6271684 Method and apparatus for stalling OTB domino circuits |
| 08/07/2001 | US6271683 Dynamic logic scan gate method and apparatus |
| 08/07/2001 | US6271681 PCI-compatible programmable logic devices |
| 08/07/2001 | US6271680 Logic element for a programmable logic integrated circuit |
| 08/07/2001 | US6271679 I/O cell configuration for multiple I/O standards |
| 08/02/2001 | WO2001056160A1 Variable logical circuit, semiconductor integrated circuit, and method for manufacturing semiconductor integrated circuit |
| 08/02/2001 | WO2001056159A1 Semiconductor device |
| 08/02/2001 | WO2001056158A1 Semiconductor device |
| 08/02/2001 | WO2001056155A2 Mixed swing voltage repeaters for high resistance or high capacitance signal lines and methods therefor |
| 08/02/2001 | WO2001056070A1 Planarization process to achieve improved uniformity across semiconductor wafers |
| 08/02/2001 | WO2001056032A2 Reduced voltage input/reduced voltage output repeaters for high resistance or high capacitance signal lines and methods therefor |
| 08/02/2001 | WO2001056031A2 Full swing voltage input/full swing voltage output bi-directional repeaters for high resistance or high capacitance bi-directional signal lines and methods therefor |
| 08/02/2001 | WO2001055821A2 Microprocessor resistant to power analysis |
| 08/02/2001 | US20010010476 Protecting apparatus for protecting the isolation circuit between different power domains |
| 08/02/2001 | US20010010471 High-performance interconnect |
| 08/02/2001 | DE10061666A1 Verringerung der Leistungsdissipation in medizinischen Geräten unter Verwendung einer adiabatischen Logik Reducing the power dissipation in medical devices using an adiabatic logic |
| 08/02/2001 | DE10001371A1 Integrierte Schaltung mit einem Differenzverstärker An integrated circuit with a differential amplifier |
| 08/01/2001 | EP1119914A1 An integrated circuit provided with a fail-safe mode |
| 08/01/2001 | EP1119892A1 Fault tolerant bus for clustered system |
| 08/01/2001 | EP1119858A1 Decoder element for producing an output signal with three different potentials and operating method for said decoder element |
| 08/01/2001 | EP0700598B1 Negative voltage generator for flash eprom design |
| 07/31/2001 | US6269042 I/O circuit of semiconductor integrated device |
| 07/31/2001 | US6268755 MOSFET predrive circuit with independent control of the output voltage rise and fall time, with improved latch immunity |
| 07/31/2001 | US6268748 Module with low leakage driver circuits and method of operation |
| 07/31/2001 | US6268746 Method and apparatus for logic synchronization |
| 07/31/2001 | US6268744 Three level pre-buffer voltage level shifting circuit and method |
| 07/31/2001 | US6268743 Block symmetrization in a field programmable gate array |
| 07/31/2001 | US6268741 Semiconductor integrated circuits with power reduction mechanism |
| 07/26/2001 | WO2001054280A1 Programmable array logic circuit employing non-volatile ferromagnetic memory cells |
| 07/26/2001 | WO2001054278A1 Driver circuit |
| 07/26/2001 | WO2001054275A1 Arrangement and method for adjusting the slope times of one or more drivers and a driver circuit |
| 07/26/2001 | WO2001054133A1 A programmable array logic circuit macrocell using ferromagnetic memory cells |
| 07/26/2001 | WO2001054047A1 Method and circuit for providing interface signals between integrated circuits |
| 07/26/2001 | US20010010074 Data processing method by programmable logic device, programmable logic device, information processing system and method of reconfiguring circuit in programmable logic |
| 07/26/2001 | US20010009380 Tightly controlled output level CMOS-PECL driver |
| 07/26/2001 | US20010009379 Programmable I/O cells with multiple drivers |
| 07/25/2001 | EP1118080A1 Decoder element for producing an output signal with three different potentials |
| 07/25/2001 | EP1118065A1 Circuit and method for authenticating the content of a memory location |
| 07/24/2001 | US6266800 System and method for eliminating effects of parasitic bipolar transistor action in dynamic logic using setup time determination |