Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
08/2001
08/30/2001US20010018245 Method for manufacturing semiconductor devices
08/30/2001US20010018243 Method for fabricating a semiconductor device
08/30/2001US20010018241 Transistor and method for fabricating the same
08/30/2001US20010018240 Method of fabricating thin film transistor
08/30/2001US20010018238 Method of fabricating an array substrate
08/30/2001US20010018227 Process for producing a semiconductor device
08/30/2001US20010018224 Semiconductor device and manufacturing method thereof
08/30/2001US20010018221 Method of manufacturing ferroelectric memory device
08/30/2001US20010017807 Semiconductor memory device allowing static-charge tolerance test between bit lines
08/30/2001US20010017798 Semiconductor integrated circuit device and data processor device
08/30/2001US20010017789 Nonvolatile semiconductor memory device having a data reprogram mode
08/30/2001US20010017786 Integrated optoelectronic device with an avalanche photodetector and method of making the same using commercial CMOS processes
08/30/2001US20010017683 Electro-optical device
08/30/2001US20010017417 Semiconductor device with a condductive metal layer engaging not less than fifty percent of a source\drain region
08/30/2001US20010017400 Semiconductor device
08/30/2001US20010017399 Bipolar transistor and manufacturing method thereof
08/30/2001US20010017396 High resistance integrated circuit resistor
08/30/2001US20010017393 Diode and method for manufacturing the same
08/30/2001US20010017392 Vertical transport MOSFETs and method for making the same
08/30/2001US20010017391 Method of fabricating semiconductor device
08/30/2001US20010017390 Non-uniform gate/dielectric field effect transistor
08/30/2001US20010017389 Semiconductor device and method of manufacturing such a device
08/30/2001US20010017388 Semiconductor device and method of manufacturing same
08/30/2001US20010017387 Method of fabricating buried source to shrink chip size in memory array
08/30/2001US20010017386 Memory configuration and method for reading a state from and storing a state in a ferroelectric transistor
08/30/2001US20010017385 Semiconductor device
08/30/2001US20010017382 Optimized low leakage diodes, including photodiodes
08/30/2001US20010017379 High voltage transistor using P+ buried layer
08/30/2001US20010017378 Semiconductor device
08/30/2001US20010017377 Chip-type semiconductor device
08/30/2001US20010017374 Semi-insulating silicon carbide without vanadium domination
08/30/2001US20010017371 Display device such as electro-optic element and thin film transistor and display device manufacturing method
08/30/2001US20010017370 Nitride based transistors on semi-insulating silicon carbide substrates
08/30/2001US20010017265 Molecular recognition type chemical CCD
08/30/2001DE10008545A1 Monolithic integrated semiconducting component has first region with additional contact to higher concentration region so Ohmic contact exists and is connected to Schottky diode(s)
08/29/2001EP1128443A1 Field-effect semiconductor device
08/29/2001EP1128442A2 Lateral thyristor structure for protection against electrostatic discharge
08/29/2001EP1128441A2 Semiconductor devices comprising a SOI bipolar transistor and corresponding manufacturing methods
08/29/2001EP1128440A2 Semiconductor junction profile and method for the production thereof
08/29/2001EP1128439A2 Active matrix display device
08/29/2001EP1128430A2 Semiconductor device and method of manufacturing the same
08/29/2001EP1128427A2 Manufacturing semiconductor devices
08/29/2001EP1128389A1 Write/Sense amplifier with vertical transistors for DRAM
08/29/2001EP1128356A2 Precharge circuit and image display device using the same
08/29/2001EP1128174A2 Capacitance-type pressure sensor and its manufacture
08/29/2001EP1128173A2 Capacitive semiconductor pressure sensor
08/29/2001EP1127379A1 Vertically structured semiconductor power module
08/29/2001EP1127378A1 Ferroelectric thin films of reduced tetragonality
08/29/2001EP1127371A1 Method of oxidizing a substrate in the presence of nitride and oxynitride films
08/29/2001EP1127368A2 Method for forming silicide regions on an integrated device
08/29/2001EP0694086B1 Method for planarization of submicron vias and the manufacture of semiconductor integrated circuits
08/29/2001CN1310883A Mask configurable smart power circuit-applications and GS-NMOS devices
08/29/2001CN1310863A Independently programmable memory segments in isolated N-wells within A PMOS EEPROM array and method therefor
08/29/2001CN1310861A Semiconductor thin film and thin film device
08/29/2001CN1310846A Electrically erasable nonvolatile memory
08/29/2001CN1310479A Semi-conductor device
08/29/2001CN1310474A Large power semiconductor assembly capable of relieving mechanical stress
08/29/2001CN1310452A Code addressing storage cell for flash memory device
08/28/2001US6282123 Method of fabricating, programming, and erasing a dual pocket two sided program/erase non-volatile memory cell
08/28/2001US6281954 Liquid crystal display device and method for manufacturing the same
08/28/2001US6281865 Driving circuit of liquid crystal display device
08/28/2001US6281756 Transistor with internal matching circuit
08/28/2001US6281593 SOI MOSFET body contact and method of fabrication
08/28/2001US6281591 Semiconductor apparatus and semiconductor apparatus manufacturing method
08/28/2001US6281569 Pressure-contact semiconductor device
08/28/2001US6281565 Semiconductor device and method for producing the same
08/28/2001US6281559 Gate stack structure for variable threshold voltage
08/28/2001US6281556 Process for forming a low resistivity titanium silicide layer on a silicon semiconductor substrate and the resulting device
08/28/2001US6281553 Semiconductor device, electrostatic discharge protection device, and dielectric breakdown preventing method
08/28/2001US6281552 Thin film transistors having ldd regions
08/28/2001US6281549 MOSFET component
08/28/2001US6281548 Power semiconductor device using semi-insulating polycrystalline silicon
08/28/2001US6281547 Power transistor cells provided with reliable trenched source contacts connected to narrower source manufactured without a source mask
08/28/2001US6281546 Insulated gate field effect transistor and manufacturing method of the same
08/28/2001US6281545 Multi-level, split-gate, flash memory cell
08/28/2001US6281539 Structure and process for 6F2 DT cell having vertical MOSFET and large storage capacitance
08/28/2001US6281537 Ferroelectric memory device guaranteeing electrical interconnection between lower capacitor electrode and contact plug and method for fabricating the same
08/28/2001US6281536 Ferroelectric memory device with improved ferroelectric capacity characteristic
08/28/2001US6281535 Three-dimensional ferroelectric capacitor structure for nonvolatile random access memory cell
08/28/2001US6281532 Technique to obtain increased channel mobilities in NMOS transistors by gate electrode engineering
08/28/2001US6281530 LPNP utilizing base ballast resistor
08/28/2001US6281528 Ohmic contact improvement between layer of a semiconductor device
08/28/2001US6281521 Silicon carbide horizontal channel buffered gate semiconductor devices
08/28/2001US6281520 Gate insulated field effect transistors and method of manufacturing the same
08/28/2001US6281519 Quantum semiconductor memory device including quantum dots
08/28/2001US6281470 Thin film semiconductor device uniforming characteristics of semiconductor elements and manufacturing method thereof
08/28/2001US6281141 Process for forming thin dielectric layers in semiconductor devices
08/28/2001US6281138 System and method for forming a uniform thin gate oxide layer
08/28/2001US6281119 Method for making contact with a semiconductor layer and semiconductor structure having a plurality of layers
08/28/2001US6281100 Semiconductor processing methods
08/28/2001US6281097 Self-aligned selectively grown sige base (sssb) bipolar transistor including an epitaxial layer made of sige alloy as a base layer.
08/28/2001US6281095 Process of manufacturing silicon-on-insulator chip having an isolation barrier for reliability
08/28/2001US6281086 Semiconductor device having a low resistance gate conductor and method of fabrication the same
08/28/2001US6281085 Method of manufacturing a semiconductor device
08/28/2001US6281083 Methods of forming field effect transistor gates, and methods of forming integrated circuitry
08/28/2001US6281079 MOS transistor in a single-transistor memory cell having a locally thickened gate oxide, and production process
08/28/2001US6281076 Method for manufacturing nonvolatile memory device capable of preventing damage to side walls of stacked gate and active region
08/28/2001US6281075 Method of controlling of floating gate oxide growth by use of an oxygen barrier
08/28/2001US6281064 Method for providing dual work function doping and protective insulating cap
08/28/2001US6281062 MOS semiconductor device with self-aligned punchthrough stops and method of fabrication