Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
12/2002
12/12/2002WO2002099872A1 Semiconductor integrated circuit device and its production method
12/12/2002WO2002099870A1 Production method for semiconductor device
12/12/2002WO2002099869A1 A method concerning a junction barrier schottky diode, such a diode and use thereof
12/12/2002WO2002099868A1 Method of fabricating semiconductor device
12/12/2002WO2002099866A2 Oxidation of silicon nitride films in semiconductor devices
12/12/2002WO2002099861A1 Rector having a movale shuter
12/12/2002WO2002099808A1 Steering gate and bit line segmentation in non-volatile memories
12/12/2002WO2002099807A2 Method and apparatus for boosting bitlines for low vcc read
12/12/2002WO2002099519A1 Transistor operating point setting method and circuit thereof, signal component value modification method, and active matrix liquid crystal display apparatus
12/12/2002WO2002075817A3 Improved schottky device
12/12/2002WO2002075787A3 Method of manufacturing a semiconductor device with metallization layers interconnected by tungsten plugs
12/12/2002WO2002073662A3 Non-uniform power semiconductor and method for making
12/12/2002WO2001099137A3 Spintronic devices and method for injecting spin-polarized electrical currents into semi-conductors
12/12/2002US20020187654 Methods and apparatus for forming a high dielectric film and the dielectric film formed thereby
12/12/2002US20020187651 Method for making a semiconductor device
12/12/2002US20020187648 Material removal method for forming a structure
12/12/2002US20020187646 Notched gate configuration for high performance integrated circuits
12/12/2002US20020187644 Vapor deposition using organometallic or organosilicon compound
12/12/2002US20020187623 Compound semiconductor device with delta doped layer under etching stopper layer for decreasing resistance between active layer and ohmic electrode and process of fabrication thereof
12/12/2002US20020187622 Method for processing a surface of an SiC semiconductor layer and schottky contact
12/12/2002US20020187621 Method of manufacturing semiconductor device
12/12/2002US20020187617 Self-aligned source pocket for flash memory cells
12/12/2002US20020187612 Compact body for silicon-on-insulator transistors requiring no additional layout area
12/12/2002US20020187610 Dual gate logic device
12/12/2002US20020187609 Non-volatile memory devices and methods of fabricating the same
12/12/2002US20020187606 Interconnect line selectively isolated from an underlying contact plug
12/12/2002US20020187605 Multiple deposition of metal layers for the fabrication of an upper capacitor electrode of a trench capacitor
12/12/2002US20020187604 Semiconductor devices and manufacturing methods thereof
12/12/2002US20020187603 Method for fabricating recessed lightly doped drain field effect transistors
12/12/2002US20020187600 Semiconductor structure exhibiting reduced leakage current and method of fabricating same
12/12/2002US20020187597 Semiconductor device with vertical MOSFET and method of fabricating same
12/12/2002US20020187594 Method of manufacturing a semiconductor device
12/12/2002US20020187592 Method for forming a thin-film transistor
12/12/2002US20020187587 Method of manufacturing a semiconductor structure having stacked semiconductor devices
12/12/2002US20020187573 Method of deforming a pattern and semiconductor device formed by utilizing deformed pattern
12/12/2002US20020187572 Manufacturing method of thin film transistor panel
12/12/2002US20020187569 Silicon crystallization method
12/12/2002US20020187568 Forming semiconductor structures including acticated acceptors in buried p-type gan layers
12/12/2002US20020187266 Metal film pattern and manufacturing method thereof
12/12/2002US20020187255 Method of fabricating organic electroluminescent display
12/12/2002US20020186589 Nonvolatile semiconductor memory device
12/12/2002US20020186583 Recessed magnetic storage element and method of formation
12/12/2002US20020186518 Overvoltage protection circuit
12/12/2002US20020186341 IC chip and display device using the same
12/12/2002US20020186330 Liquid crystal display and production method of the same
12/12/2002US20020185738 Integrated circuit having a passive device integrally formed therein
12/12/2002US20020185732 Ohmic contact to semiconductor devices and method of manufacturing the same
12/12/2002US20020185708 C implants for improved SiGe bipolar yield
12/12/2002US20020185705 Power semiconductor device having RESURF layer
12/12/2002US20020185698 Gate for preventing dopants from penetrating a gate insulator and method of forming the same
12/12/2002US20020185697 Epitaxial growth method
12/12/2002US20020185696 Lateral DMOS structure with lateral extension structure for reduced charge trapping in gate oxide
12/12/2002US20020185695 Lateral DMOS structure with lateral extension structure for reduced charge trapping in gate oxide
12/12/2002US20020185693 Semiconductor device and method for manufacturing the same
12/12/2002US20020185692 Semiconductor device and an electronic device
12/12/2002US20020185687 Semiconductor device and method of fabricating the same
12/12/2002US20020185685 Leaky, thermally conductive insulator material (LTCIM) in semiconductor-on-insulator (SOI) structure
12/12/2002US20020185684 Method and structure for buried circuits and devices
12/12/2002US20020185682 Additional n-type LDD/pocket implant for improving short-channel NMOS ESD robustness
12/12/2002US20020185681 Power MOS transistor having capability for setting substrate potential independently of source potential
12/12/2002US20020185680 Trench power semiconductor component
12/12/2002US20020185679 Power semiconductor devices having linear transfer characteristics and methods of forming and operating same
12/12/2002US20020185678 Method for fabricating a mosfet and a mosfet
12/12/2002US20020185677 Electronic power device integrated on a semiconductor material and related manufacturing process
12/12/2002US20020185676 Semiconductor device
12/12/2002US20020185675 SOI device with reduced junction capacitance
12/12/2002US20020185674 Nonvolatile semiconductor storage device and production method therefor
12/12/2002US20020185673 Structure of a low-voltage channel write/erase flash memory cell and fabricating method thereof
12/12/2002US20020185670 Nonvolatile semiconductor memory
12/12/2002US20020185657 Method of manufacturing a bipolar transistor of double-polysilicon, heterojunction-base type and corresponding transistor
12/12/2002US20020185656 Semiconductor device
12/12/2002US20020185655 Ultra-linear multi-channel field effect transistor
12/12/2002US20020185654 Technique for suppression of edge current in semiconductor devices
12/12/2002US20020185645 Overvoltage protection device
12/12/2002US20020185642 Semiconductor device and method of manufacturing the same
12/12/2002US20020185641 Compound semiconductor device
12/12/2002US20020185173 Solar cells incorporating light harvesting arrays
12/12/2002US20020185068 Reactor having a movable shutter
12/12/2002DE10161129A1 Halbleitervorrichtung und Verfahren zu ihrer Herstellung Semiconductor device and process for their preparation
12/12/2002DE10158496A1 Leistungshalbleiterbauelement mit Temperaturdetektor Power semiconductor component with temperature detector
12/12/2002DE10126628A1 Halbleiterstruktur mit ESD-Schutzeinrichtung Semiconductor structure with ESD protection device
12/12/2002DE10126627A1 Halbleiterstruktur und Verfahren zur Verbesserung der ESD-Festigkeit derselben Semiconductor structure and method for improving the ESD strength thereof
12/12/2002DE10126328A1 Integrierte, abstimmbare Kapazität Integrated tunable capacitance
12/12/2002DE10125800A1 Speicherbaustein mit einer Speicherzelle und Verfahren zur Herstellung eines Speicherbausteins Memory device having a memory cell and method for manufacturing a memory device
12/12/2002DE10125711A1 Semiconductor element used as a hetero-structure bipolar or field effect transistor has semiconductor layer system formed on a substrate.
12/11/2002EP1265295A2 Silicon carbide Schottky diode and method for manufacturing the same
12/11/2002EP1265294A2 Heterojunction bipolar transistor
12/11/2002EP1265293A2 Semiconductor component having pores and method of making the same
12/11/2002EP1265292A2 Charge multiplier with logarithmic dynamic range compression implemented in charge domain
12/11/2002EP1265289A2 Electrically erasable and programmable memory device
12/11/2002EP1265285A2 High - voltage semiconductor device
12/11/2002EP1265279A1 Flash memory device and method for manufacturing the same, and method for forming dielectric film
12/11/2002EP1265277A2 Additional n-type LDD/pocket implant for improving short-channel nmos ESD robustness
12/11/2002EP1265276A1 Method for forming dielectric film
12/11/2002EP1265275A2 Thermal stability improvement of CoSi2 film by stuffing in titanium
12/11/2002EP1264351A1 Integrated component comprising a metal-insulator-metal capacitor
12/11/2002EP1264350A2 Vertical high-voltage semiconductor component
12/11/2002EP1264345A2 Spin transistor
12/11/2002EP1264342A1 A dual spacer process for non-volatile memory devices
12/11/2002EP1264337A1 Method of manufacturing source/drain regions having a deep junction
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