H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof

Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
12/2002
12/19/2002	US20020192956 Formation of silicon on insulator (SOI) devices as add-on modules for system on a chip processing
12/19/2002	US20020192949 Embedded metal nanocrystals
12/19/2002	US20020192933 Semiconductor devices fabricated using sputtered silicon targets
12/19/2002	US20020192931 Method of manufacturing semiconductor device
12/19/2002	US20020192930 Method of forming a single crystalline silicon pattern utilizing a structural selective epitaxial growth technique and a selective silicon etching technique
12/19/2002	US20020192918 Heterojunction bipolar transistor and method for fabricating the same
12/19/2002	US20020192916 Bipolar transistor with ultra small polysilicon emitter and method of fabricating the transistor
12/19/2002	US20020192915 Method for fabricating semiconductor device
12/19/2002	US20020192914 CMOS device fabrication utilizing selective laser anneal to form raised source/drain areas
12/19/2002	US20020192912 Asymmetric gates for high density DRAM
12/19/2002	US20020192911 Damascene double gated transistors and related manufacturing methods
12/19/2002	US20020192910 Simultaneous formation of charge storage and bitline to wordline isolation
12/19/2002	US20020192909 Nucleation for improved flash erase characteristics
12/19/2002	US20020192908 Split gate field effect transistor (fet) device with annular floating gate electrode and method for fabrication thereof
12/19/2002	US20020192902 Semiconductor memory device and manufacturing method thereof
12/19/2002	US20020192901 Semiconductor memory device and manufacturing method thereof
12/19/2002	US20020192894 Method for forming a super self-aligned hetero-junction bipolar transistor
12/19/2002	US20020192893 Semiconductor device and method of fabricating the same
12/19/2002	US20020192890 Mosfet device and fabrication method thereof
12/19/2002	US20020192889 Method for using thin spacers and oxidation in gate oxides
12/19/2002	US20020192888 Surface engineering to prevent epi growth on gate poly during selective epi processing
12/19/2002	US20020192887 Non-volatile semiconductor memory and method of making same, and semiconductor device and method of making device
12/19/2002	US20020192886 Semiconductor device and manufacturing method thereof
12/19/2002	US20020192885 Fabrication process for thin film transistors in a display or electronic device
12/19/2002	US20020192884 Method for forming thin film transistor with reduced metal impurities
12/19/2002	US20020192882 Method of fabricating thin film transistor
12/19/2002	US20020192881 High-dielectric constant insulators for feol capacitors
12/19/2002	US20020192861 Method and apparatus for filling a gap between spaced layers of a semiconductor
12/19/2002	US20020192851 Method for treating surface of organic insulating film and method of fabricating thin film transistor substrate using the same
12/19/2002	US20020192320 Method and apparatus for filling a gap between spaced layers of a semiconductor
12/19/2002	US20020191458 Semiconductor integrated circuit device, production and operation method thereof
12/19/2002	US20020191453 Nonvolatile semiconductor memory device
12/19/2002	US20020191445 Semiconductor device
12/19/2002	US20020191443 Nonvolatile semiconductor memory device and programming method thereof
12/19/2002	US20020191441 Nonvolatile semiconductor memory device
12/19/2002	US20020191438 Semiconductor device with improved latch arrangement
12/19/2002	US20020191436 Semiconductor memory device
12/19/2002	US20020191301 Laser irradiation stage, laser irradiation optical system, laser irradiation apparatus, laser irradiation method, and method of manufacturing a semiconductor device
12/19/2002	US20020191138 Active matrix type liquid crystal display device and fabrication method thereof
12/19/2002	US20020191124 Liquid crystal display device and process for producing same
12/19/2002	US20020191123 Active plate
12/19/2002	US20020191122 Method of forming electrodes or pixel electrodes and a liquid crystal display device
12/19/2002	US20020191093 Charge multiplier with logarithmic dynamic range compression implemented in charge domain
12/19/2002	US20020190713 Magnetic device
12/19/2002	US20020190387 Substantially hillock-free aluminum-containing components
12/19/2002	US20020190385 Silicon nitride read only memory structure and method of programming and erasure
12/19/2002	US20020190382 Semiconductor device having dummy patterns for metal cmp
12/19/2002	US20020190355 Permanently on transistor implemented using a double polysilicon layer CMOS process with buried contact
12/19/2002	US20020190351 Semiconductor device and method of manufacture
12/19/2002	US20020190349 Semiconductor device and method of manufacturing same
12/19/2002	US20020190347 Semiconductor device with variable pin locations
12/19/2002	US20020190344 Semiconductor device having a ghost source/drain region and a method of manufacture therefor
12/19/2002	US20020190343 Integration of two memory types on the same integrated circuit
12/19/2002	US20020190341 Semiconductor device with a protective diode having a high breakdown voltage
12/19/2002	US20020190340 Semiconductor device
12/19/2002	US20020190338 Termination for high voltage Schottky diode
12/19/2002	US20020190334 Thin film transistor and liquid crystal display device
12/19/2002	US20020190333 ESD protection devices and methods for reducing trigger voltage
12/19/2002	US20020190332 Thin film transistor, and organic EL display thereof and method for fabricating the same
12/19/2002	US20020190331 A semiconductor device having at least one source/drain region formed on an isolation region and a method of manufacture therefor
12/19/2002	US20020190329 Self-light-emitting apparatus and semiconductor device used in the apparatus
12/19/2002	US20020190325 Power semiconductor device
12/19/2002	US20020190324 Overvoltage protection device
12/19/2002	US20020190323 Semiconductor device and its manufacturing method
12/19/2002	US20020190321 Semiconductor device and method of fabricating the same
12/19/2002	US20020190320 Semiconductor device using soi device and semiconductor integrated circuit using the semiconductor device
12/19/2002	US20020190315 Graded LDD implant process for sub-half-micron MOS devices
12/19/2002	US20020190314 Methods for manufacturing semiconductor devices and semiconductor devices
12/19/2002	US20020190313 Semiconductor device having mosfet of trench structure and method for fabricating the same
12/19/2002	US20020190312 Semiconductor device and method of fabricating the same
12/19/2002	US20020190311 Insulating barrier, NVM bandgap design
12/19/2002	US20020190309 Method for manufacturing a semiconductor device having lateral MOSFET (LDMOS)
12/19/2002	US20020190307 Nonvolatile memories with floating gate spacers, and methods of fabrication
12/19/2002	US20020190306 Nonvolatile semiconductor memory device and manufacturing method thereof
12/19/2002	US20020190305 Nonvolatile memories with floating gate spacers, and methods of fabrication
12/19/2002	US20020190304 Nonvolatile ferroelectric memory device
12/19/2002	US20020190302 Complementary metal oxide semiconductor (CMOS) gate stack with high dielectric constant gate dielectric and integrated diffusion barrier
12/19/2002	US20020190296 Nonvolatile memory and method for driving nonvolatile memory
12/19/2002	US20020190293 Semiconductor device having a ferroelectric capacitor
12/19/2002	US20020190287 Tapered threshold reset FET for CMOS imagers
12/19/2002	US20020190285 Power supply apparatus using power semiconductor switching element
12/19/2002	US20020190284 Novel mos transistor structure and method of fabrication
12/19/2002	US20020190282 Power MOS device with improved gate charge performance
12/19/2002	US20020190281 Hydrogen implant for buffer zone of punch-through non EPI IGBT
12/19/2002	US20020190275 III nitride film and a III nitride multilayer
12/19/2002	US20020190274 High density single transistor ferroelectric non-volatile memory
12/19/2002	US20020190273 Bipolar transistor with upper heterojunction collector and method for making same
12/19/2002	US20020190272 Heterojunction bipolar transistor with tensile graded carbon-doped base layer grown by mocvd
12/19/2002	US20020190271 InP heterojunction bipolar transistor with intentionally compressively mismatched base layer
12/19/2002	US20020190268 Methods of forming transistor devices
12/19/2002	US20020190258 Horizontal junction field-effect transistor
12/19/2002	US20020190249 Quantum computer
12/19/2002	US20020190048 Fabrication of an electrically conductive silicon carbide article
12/19/2002	US20020189952 Method for forming ordered structure of fine metal particles
12/19/2002	US20020189355 Small size, high capacitance readout silicon based MEMS accelerometer
12/19/2002	DE10225864A1 MOSFET semiconductor component has low input resistance layer beneath high breakdown voltage layer
12/19/2002	DE10216016A1 Halbleitervorrichtung zum Messen einer physikalischen Größe Semiconductor device for measuring a physical quantity
12/19/2002	DE10209989A1 Production of trench capacitor structures used for dynamic random access memories comprises forming deep trench openings in a first semiconductor structure, forming a trenched plate region, and further processing
12/19/2002	DE10164049A1 Passive Bauelementstruktur und zugehöriges integriertes Schaltkreisbauelement und Halbleiterbauelement Passive component structure and related integrated circuit device and semiconductor device
12/19/2002	DE10127952A1 Lateral pin diode and manufacturing process has separated p and n regions on a substrate with a region of lower dopant concentration between them

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