Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143) |
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02/25/2003 | US6525532 Stacked layer creating tunneling junctions; ferromagnetic particles between barrier layers |
02/25/2003 | US6525403 Semiconductor device having MIS field effect transistors or three-dimensional structure |
02/25/2003 | US6525402 Semiconductor wafer, method of manufacturing the same and semiconductor device |
02/25/2003 | US6525400 Semiconductor memory device and method of manufacturing the same |
02/25/2003 | US6525390 MIS semiconductor device with low on resistance and high breakdown voltage |
02/25/2003 | US6525389 High voltage termination with amorphous silicon layer below the field plate |
02/25/2003 | US6525388 Compound semiconductor device having diode connected between emitter and collector of bipolar transistor |
02/25/2003 | US6525384 Conductor layer nitridation |
02/25/2003 | US6525383 Power MOSFET |
02/25/2003 | US6525381 Semiconductor-on-insulator body-source contact using shallow-doped source, and method |
02/25/2003 | US6525380 CMOS with a fixed charge in the gate dielectric |
02/25/2003 | US6525379 Memory device, method of manufacturing the same, and integrated circuit |
02/25/2003 | US6525378 Raised S/D region for optimal silicidation to control floating body effects in SOI devices |
02/25/2003 | US6525377 Low threshold voltage MOS transistor and method of manufacture |
02/25/2003 | US6525376 High withstand voltage insulated gate N-channel field effect transistor |
02/25/2003 | US6525375 Semiconductor device having trench filled up with gate electrode |
02/25/2003 | US6525374 Semiconductor component with a high breakdown voltage |
02/25/2003 | US6525373 Power semiconductor device having trench gate structure and method for manufacturing the same |
02/25/2003 | US6525372 P-N rectifying junction; quad arrangement |
02/25/2003 | US6525371 Floating gates adjacent to vertical insulating spacers; computers |
02/25/2003 | US6525370 Semiconductor device including transistor with composite gate structure and transistor with single gate structure and method for manufacturing the same |
02/25/2003 | US6525369 Self-aligned split-gate flash memory cell and its contactless flash memory arrays |
02/25/2003 | US6525367 Electrode protective film for high melting point silicide or metal gate electrodes |
02/25/2003 | US6525364 Capacitor for semiconductor memory device and method of manufacturing the same |
02/25/2003 | US6525360 Semiconductor device using a shallow trench isolation |
02/25/2003 | US6525359 Resin-encapsulated semiconductor apparatus and process for its fabrication |
02/25/2003 | US6525357 Barrier layers ferroelectric memory devices |
02/25/2003 | US6525353 Silicon oxynitride and silicon oxide films; pattern accuracy for gate electrode |
02/25/2003 | US6525349 Heterojunction bipolar transistor with tensile graded carbon-doped base layer grown by MOCVD |
02/25/2003 | US6525346 Semiconductor device and its manufacturing method capable of reducing low frequency noise |
02/25/2003 | US6525341 Low- and high defect density amorphous silicon layers |
02/25/2003 | US6525340 Semiconductor device with junction isolation |
02/25/2003 | US6525338 Semiconductor substrate, field effect transistor, method of forming SiGe layer and method of forming strained Si layer using same, and method of manufacturing field effect transistor |
02/25/2003 | US6525337 Light and/or electron element |
02/25/2003 | US6524977 Method of laser annealing using linear beam having quasi-trapezoidal energy profile for increased depth of focus |
02/25/2003 | US6524976 Method of heat-treating nitride compound semiconductor layer and method of producing semiconductor device |
02/25/2003 | US6524968 Method for forming insulating film and for manufacturing integrated circuit |
02/25/2003 | US6524958 Method of forming channel in thin film transistor using non-ionic excited species |
02/25/2003 | US6524954 Reduction of tungsten silicide resistivity by boron ion implantation |
02/25/2003 | US6524945 Method of making an anti-reflection structure for a conductive layer in a semiconductor device |
02/25/2003 | US6524939 Dual salicidation process |
02/25/2003 | US6524938 Method for gate formation with improved spacer profile control |
02/25/2003 | US6524937 Selective T-gate process |
02/25/2003 | US6524935 Preparation of strained Si/SiGe on insulator by hydrogen induced layer transfer technique |
02/25/2003 | US6524928 Semiconductor device and method for manufacturing the same |
02/25/2003 | US6524921 Methods of forming bipolar transistor constructions |
02/25/2003 | US6524920 Low temperature process for a transistor with elevated source and drain |
02/25/2003 | US6524919 Method for manufacturing a metal oxide semiconductor with a sharp corner spacer |
02/25/2003 | US6524918 Method for manufacturing a gate structure incorporating therein aluminum oxide as a gate dielectric |
02/25/2003 | US6524916 Controlled gate length and gate profile semiconductor device and manufacturing method therefor |
02/25/2003 | US6524915 Split-gate flash memory and method of manufacturing the same |
02/25/2003 | US6524914 Source side boron implanting and diffusing device architecture for deep sub 0.18 micron flash memory |
02/25/2003 | US6524913 Method of fabricating a non-volatile memory with a spacer |
02/25/2003 | US6524911 Combination of BPTEOS oxide film with CMP and RTA to achieve good data retention |
02/25/2003 | US6524910 Method of forming dual thickness gate dielectric structures via use of silicon nitride layers |
02/25/2003 | US6524903 Method of manufacturing a semiconductor device having two peaks in an impurity concentration distribution |
02/25/2003 | US6524902 Method of manufacturing CMOS semiconductor device |
02/25/2003 | US6524901 Method for forming a notched damascene planar poly/metal gate |
02/25/2003 | US6524900 Method concerning a junction barrier Schottky diode, such a diode and use thereof |
02/25/2003 | US6524899 Process for forming a large area, high gate current HEMT diode |
02/25/2003 | US6524898 Method of fabricating a protective element in an SOI substrate |
02/25/2003 | US6524897 Semiconductor-on-insulator resistor-capacitor circuit |
02/25/2003 | US6524895 Semiconductor device and method of fabricating the same |
02/25/2003 | US6524894 Semiconductor device for use in power-switching device and method of manufacturing the same |
02/25/2003 | US6524893 Electrostatic discharge protection device for semiconductor integrated circuit, method for producing the same, and electrostatic discharge protection circuit using the same |
02/25/2003 | US6524883 Quantum dot of single electron memory device and method for fabricating thereof |
02/25/2003 | US6524876 Thin film transistor array panels for a liquid crystal display and a method for manufacturing the same |
02/25/2003 | US6523399 Control unit for a motor vehicle |
02/25/2003 | CA2256699C Crystallization processing of semiconductor film regions on a substrate, and devices made therewith |
02/20/2003 | WO2003015283A2 Method of manufacture for 80 nanometer diameter resonant tunneling diode with improved peak-to-valley ratio and resonant tunneling diode therefrom |
02/20/2003 | WO2003015248A2 Low-voltage punch-through bi-directional transient-voltage suppression devices having surface breakdown protection and methods of making the same |
02/20/2003 | WO2003015183A1 Method for manufacturing thin-film structure |
02/20/2003 | WO2003015182A2 Fin field effect transistor and method for producing a fin field effect transistor |
02/20/2003 | WO2003015181A1 Transistor having high dielectric constant gate insulating layer and source and drain forming schottky contact with substrate |
02/20/2003 | WO2003015180A2 Mis device having a trench gate electrode and method of making the same |
02/20/2003 | WO2003015179A2 Mis device having a trench gate electrode and method of making the same |
02/20/2003 | WO2003015178A1 Trench bipolar transistor |
02/20/2003 | WO2003015177A1 Bipolar transistor and method of manufacturing same |
02/20/2003 | WO2003015175A1 Bipolar transistor, semiconductor device and method of manufacturing same |
02/20/2003 | WO2003015174A2 High electron mobility devices |
02/20/2003 | WO2003015173A2 Floating gate memory array and methods of forming |
02/20/2003 | WO2003015172A2 Method of manufacturing a non-volatile memory |
02/20/2003 | WO2003015171A1 Open bit line dram with vertical ultra-thin body transistors |
02/20/2003 | WO2003015160A2 Dual layer cmos devices |
02/20/2003 | WO2003015152A2 Method of manufacturing a semiconductor non-volatile memory |
02/20/2003 | WO2003015151A1 Base material treating method and electron device-use material |
02/20/2003 | WO2003015142A2 Formation of planar strained layers |
02/20/2003 | WO2003015140A1 Semiconductor substrate, field-effct transistor, and their manufacturing methods |
02/20/2003 | WO2003015138A2 Optimized buried-channel fets based on sige heterostructures |
02/20/2003 | WO2003014809A2 Electrostatic discharge protection for pixellated electronic device |
02/20/2003 | WO2002097900A3 Integrated tunable capacitor |
02/20/2003 | WO2002095762A3 Flash memory device with increase of efficiency during an apde (automatic program disturb after erase) process |
02/20/2003 | WO2002091472A3 Transistor and integrated circuit |
02/20/2003 | WO2002067332A3 Semiconductor devices having field shaping regions |
02/20/2003 | WO2002061837A3 Modular display device and organic thin-film transistor |
02/20/2003 | US20030036278 Method for fabricating a gate stack in very large scale integrated semiconductor memories |
02/20/2003 | US20030036253 Method of forming an oxide film on a gate side wall of a gate structure |
02/20/2003 | US20030036252 Manufacturing method of schottky barrier diode |
02/20/2003 | US20030036251 Laser annealing method and apparatus for determining laser annealing conditions |
02/20/2003 | US20030036250 Operation method for programming and erasing a data in a P-channel sonos memory cell |