Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
02/2003
02/18/2003US6521944 Capacitive coupling oriented along sidewall of trench; semiconductors
02/18/2003US6521943 Semiconductor device having thin electrode layer adjacent gate insulator and method of manufacture
02/18/2003US6521942 Electrically programmable memory cell
02/18/2003US6521941 Non-volatile memory device and fabrication method thereof
02/18/2003US6521940 High density electronic circuit modules
02/18/2003US6521939 Interlevel dielectric overlaying electrode and diffusion junctions; two-dimensional array of contact openings; semiconductors
02/18/2003US6521938 Dynamic-type semiconductor memory device
02/18/2003US6521935 Mos transistor and dram cell configuration
02/18/2003US6521934 Semiconductor device with a plurality of elements having different heights
02/18/2003US6521932 Semiconductor device with copper wiring connected to storage capacitor
02/18/2003US6521927 Semiconductor device and method for the manufacture thereof
02/18/2003US6521925 Solid-state image sensor
02/18/2003US6521923 Microwave field effect transistor structure on silicon carbide substrate
02/18/2003US6521922 Passivation film on a semiconductor wafer
02/18/2003US6521921 Scanning probe microscope (SPM) probe having field effect transistor channel and method of fabricating the same
02/18/2003US6521920 Solid state image sensor
02/18/2003US6521919 Semiconductor device of reduced thermal resistance and increased operating area
02/18/2003US6521918 Semiconductor device and driving method thereof
02/18/2003US6521917 Semiconductor structures using a group III-nitride quaternary material system with reduced phase separation
02/18/2003US6521913 Electro-optical device and electronic equipment
02/18/2003US6521912 Semiconductor device
02/18/2003US6521909 Thin film semiconductor device containing polycrystalline Si-Ge alloy and method for producing thereof
02/18/2003US6521550 Process for manufacturing semiconductor integrated circuit device including treatment of gas used in the process
02/18/2003US6521544 Method of forming an ultra thin dielectric film
02/18/2003US6521538 Method of forming a trench with a rounded bottom in a semiconductor device
02/18/2003US6521527 Semiconductor device and method of fabricating the same
02/18/2003US6521526 Protection layer on a semiconductor substrate in which a control gate is formed in a stack structure of doped poly Si and etches only a given portion of the protection layer in a subsequent process to form a contact hole.
02/18/2003US6521525 Electro-optic device, drive substrate for electro-optic device and method of manufacturing the same
02/18/2003US6521519 MIS transistor and manufacturing method thereof
02/18/2003US6521517 Method of fabricating a gate electrode using a second conductive layer as a mask in the formation of an insulating layer by oxidation of a first conductive layer
02/18/2003US6521514 Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on sapphire substrates
02/18/2003US6521511 Thin film device transfer method, thin film device, thin film integrated circuit device, active matrix board, liquid crystal display, and electronic apparatus
02/18/2003US6521509 Semiconductor device and method of manufacturing the same
02/18/2003US6521506 Varactors for CMOS and BiCMOS technologies
02/18/2003US6521505 Radio frequency plasma etching
02/18/2003US6521504 Semiconductor device and method of fabricating the same
02/18/2003US6521502 Solid phase epitaxy activation process for source/drain junction extensions and halo regions
02/18/2003US6521500 Semiconductor device and method of manufacturing the same
02/18/2003US6521498 Manufacture or trench-gate semiconductor devices
02/18/2003US6521497 Method of manufacturing a field effect transistor
02/18/2003US6521496 Non-volatile memory semiconductor device including a graded, grown, high quality control gate oxide layer and associated methods
02/18/2003US6521495 Method of fabricating a non-volatile memory device
02/18/2003US6521492 Thin-film semiconductor device fabrication method
02/18/2003US6521489 Preferred methods for producing electrical circuit elements used to control an electronic display
02/18/2003US6521473 Method of fabricating a liquid crystal display
02/18/2003US6521042 Semiconductor growth method
02/18/2003US6520017 Micromechanical spin angular acceleration sensor
02/18/2003US6520014 Microsensor having a sensor device connected to an integrated circuit by a solder joint
02/13/2003WO2003012878A1 Semiconductor device
02/13/2003WO2003012877A2 Field effect transistor
02/13/2003WO2003012875A1 Method of artificial creation of forbidden zone in conductor materials
02/13/2003WO2003012860A2 Boron-doped titanium nitride layer for high aspect ratio semiconductor devices
02/13/2003WO2003012859A1 Electrode structure, and method for manufacturing thin-film structure
02/13/2003WO2003012854A1 Semiconductor structure comprising a magnetoresistor
02/13/2003WO2003012853A1 Substrate and method for producing the same, and thin film structure
02/13/2003WO2003012850A1 Selective metal oxide removal
02/13/2003WO2003012844A1 Xe preamorphizing implantation
02/13/2003WO2003012834A1 Coupled quantum dot and quantum well semiconductor device and method of making the same
02/13/2003WO2002082503A3 Multi-thickness silicide device
02/13/2003WO2002078090A3 Field-effect transistor structure and method of manufacture
02/13/2003WO2002078056A3 Passivation layer for molecular electronic device fabrication
02/13/2003WO2002054492A3 Circuit
02/13/2003WO2002052626A3 Method for producing a microelectronic component and component produced according to said method
02/13/2003WO2002047144A3 Patterned buried insulator
02/13/2003WO2002037570A9 Semiconductor device and method of making same
02/13/2003WO2002013041A3 Automatic check for cyclic operating conditions for soi circuit simulation
02/13/2003US20030032295 Method of building a CMOS structure on thin SOI with source/drain electrodes formed by in situ doped selective amorphous silicon
02/13/2003US20030032281 Graded thin films
02/13/2003US20030032275 Method of copper/copper surface bonding using a conducting polymer for application in IC chip bonding
02/13/2003US20030032273 Flash memory cell and method for fabricating a flash memory cell
02/13/2003US20030032270 Fabrication method for a device for regulating flow of electric current with high dielectric constant gate insulating layer and source/drain forming schottky contact or schottky-like region with substrate
02/13/2003US20030032268 Semiconductor material and method for enhancing solubility of a dopant therein
02/13/2003US20030032267 Method for forming crystalline semiconductor film and apparatus for forming the same
02/13/2003US20030032264 Method of manufacturing semiconductor device having conductive thin films
02/13/2003US20030032253 InPSb/InAs BJT device and method of making
02/13/2003US20030032252 AlGaAs or InGaP low turn-on voltage GaAs-based heterojunction bipolar transistor
02/13/2003US20030032251 Use of disposable spacer to introduce gettering in SOI layer
02/13/2003US20030032249 Semiconductor device and manufacturing method thereof
02/13/2003US20030032248 Method of fabricating trench MIS device with graduated gate oxide layer
02/13/2003US20030032247 Trench MIS device with active trench corners and thick bottom oxide and method of making the same
02/13/2003US20030032244 Method of manufacturing an integrated circuit, for integrating an electrically programmable, non-volatile memory and high-performance logic circuitry in the same semiconductor chip
02/13/2003US20030032243 Twin NAND device structure, array operations and fabrication method
02/13/2003US20030032242 Method of forming non-volatile memory having floating trap type device
02/13/2003US20030032241 Non-volatile memory device having self-aligned gate structure and method of manufacturing same
02/13/2003US20030032240 Semiconductor memory device having a multiple tunnel junction layer pattern and method of fabricating the same
02/13/2003US20030032239 Processes and structures for self-aligned contact non-volatile memory with peripheral transistors easily modifiable for various technologies and applications
02/13/2003US20030032237 High dielectric constant materials forming components of DRAM such as deep-trench capacitors and gate dielectric (insulators) for support circuits
02/13/2003US20030032234 Semiconductor integrated circuit device and method of manufacturing the same
02/13/2003US20030032232 Semiconductor transistor having a polysilicon emitter and methods of making the same
02/13/2003US20030032228 Lightly doped drain MOS transistor
02/13/2003US20030032227 MOSFET, semiconductor device using the same and production process therefor
02/13/2003US20030032226 Semiconductor integrated circuit device and method of manufacturing the same
02/13/2003US20030032225 Method to controllably form notched polysilicon gate structures
02/13/2003US20030032223 Semiconductor device and manufacturing method thereof
02/13/2003US20030032222 Pulse laser irradation method for forming a semiconductor thin film
02/13/2003US20030032221 Semiconductor device and method of manufacturing the same
02/13/2003US20030032216 Semiconductor device and manufacturing method thereof
02/13/2003US20030032213 Method of manufacturing a semiconductor device
02/13/2003US20030032210 Semiconductor device and peeling off method and method of manufacturing semiconductor device
02/13/2003US20030032206 Method of making a ferroelectric memory transistor