Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2013
05/15/2013CN103107160A Semiconductor device for increasing bit line contact area, and module and system including the same
05/15/2013CN103107159A Programmable polycrystalline silicon fuse device structure and realizing method of technology of programmable polycrystalline silicon fuse device structure
05/15/2013CN103107158A Semiconductor device and forming method thereof
05/15/2013CN103107157A Chip package, method for forming the same
05/15/2013CN103107156A Protruding block structure of wafer welding cushion and manufacturing method thereof
05/15/2013CN103107155A Double aluminum pad structure and achieving method thereof
05/15/2013CN103107154A Stress isolation welding pad structure for through silicon via (TSV) copper interconnection and manufacturing method thereof
05/15/2013CN103107153A Chip package and the forming method thereof
05/15/2013CN103107151A Termination structure for gallium nitride Schottky diode
05/15/2013CN103107150A Interposers for semiconductor devices and methods of manufacture thereof
05/15/2013CN103107146A Semiconductor package and method of manufacturing the same
05/15/2013CN103107145A Semiconductor packaging piece, prefabricated lead frame and manufacturing method thereof
05/15/2013CN103107143A Housing for a chip arrangement and a method for forming a housing
05/15/2013CN103107142A Semiconductor device having lid structure and method of making same
05/15/2013CN103107140A Thin film crystal transistor array base plate and manufacture method thereof
05/15/2013CN103107139A Structure of field effect transistor in fin-shaped structure and manufacturing method thereof
05/15/2013CN103107138A Manufacturing method of separated grid type flash memory with peripheral circuit
05/15/2013CN103107137A Manufacturing method of chip
05/15/2013CN103107136A 晶片加工方法 Wafer processing method
05/15/2013CN103107135A Manufacture method of array base plate, array base plate and display device
05/15/2013CN103107134A Array base plate and manufacture method thereof and liquid crystal display device
05/15/2013CN103107133A Array substrate, manufacturing method thereof and displaying device
05/15/2013CN103107132A Apparatus for manufacturing flat panel display
05/15/2013CN103107131A Semiconductor device, method of manufacturing the device, and liquid crystal display
05/15/2013CN103107130A Array substrate for liquid crystal display and manufacturing method thereof, etching liquid composition and method for forming metal routing
05/15/2013CN103107129A Micropore metal filling structure and method
05/15/2013CN103107128A Metal bonding method of three-dimensional chip structure and bonding structure
05/15/2013CN103107127A Processing method of multipath electrostatic discharge (ESD) protector
05/15/2013CN103107126A Method for forming copper wiring in a semiconductor device
05/15/2013CN103107125A Semiconductor device and forming method thereof
05/15/2013CN103107124A Method of improving planarization of surface of shallow trench isolation silicon oxide film
05/15/2013CN103107123A Method of integration of three-dimensional integrated power thick film hybrid integrated circuit
05/15/2013CN103107122A Positioning device to position one or more electronic circuit boards, in particular for photovoltaic cells, in a metal-deposition unit
05/15/2013CN103107121A Wafer angular deviation automatic method based on vision
05/15/2013CN103107120A Processes and integrated systems for engineering a substrate surface for metal deposition
05/15/2013CN103107119A Substrate cooling system, substrate processing apparatus, electrostatic chuck and substrate cooling method
05/15/2013CN103107118A Multiplication system of flip chip mounters
05/15/2013CN103107117A Semi-conductor processing management system and method
05/15/2013CN103107116A Solar wafer carrier
05/15/2013CN103107115A Etching control method
05/15/2013CN103107114A Manufacturing method of semi-conductor device
05/15/2013CN103107113A Etching apparatus and methods
05/15/2013CN103107112A Method for manufacturing a semiconductor device
05/15/2013CN103107111A Method and device for monitoring formation of free air ball (FAB) in wire bond
05/15/2013CN103107110A Chip observation sample manufacture method and system
05/15/2013CN103107109A Method of integration of three-dimensional integrated power thin film hybrid integrated circuit
05/15/2013CN103107108A Method for improving quality conformity of thick film hybrid integrated circuit homogeneous bonding system
05/15/2013CN103107107A Method of improving thick film hybrid integrated circuit homogenesis bonding system batch productbility
05/15/2013CN103107106A Batch productbility improvement method of multi-chip component homogeneous bonding system
05/15/2013CN103107105A Quality consistency improvement method of multi-chip component homogeneous bonding system
05/15/2013CN103107104A Flip chip manufacture method
05/15/2013CN103107103A Reconfigurable operator array structure scale extension method based on wafer level packaging (WLP) form
05/15/2013CN103107102A Method of packaging semiconductor die
05/15/2013CN103107101A Semiconductor sensor device and method of packaging same
05/15/2013CN103107100A Manufacturing method of power semiconductor device
05/15/2013CN103107099A Semiconductor packages and methods of packaging semiconductor devices
05/15/2013CN103107098A Encapsulating method of advanced square flat pins-free and encapsulating structure thereof
05/15/2013CN103107097A Chip manufacturing method of multi-project wafer and outer-layer metal mask plate of multi-project wafer
05/15/2013CN103107096A Method for producing silicon-based III-V group nMOS device
05/15/2013CN103107095A Thin film transistor, manufacturing method of thin film transistor, array substrate and display device
05/15/2013CN103107094A Depletion mode power field effect transistor and preparation method thereof
05/15/2013CN103107093A Process of preparing low voltage double electrode layer indium tin oxide (ITO) transparent thin-film transistor at full room temperature
05/15/2013CN103107092A Carbon implant for workfunction adjustment in replacement gate transistor
05/15/2013CN103107091A Semiconductor structure and manufacture method thereof
05/15/2013CN103107090A Method for manufacturing semiconductor device
05/15/2013CN103107089A Manufacturing method of non-planar transistor
05/15/2013CN103107088A Fin-shaped field effect transistor with periphery grid electrode structure and manufacturing method thereof
05/15/2013CN103107087A Manufacturing method for PNP triode integrated with germanium-silicon heterojunction NPN triode
05/15/2013CN103107086A Manufacturing technique of low-voltage chip and low-voltage chip thereof
05/15/2013CN103107085A Dry etching technology of Ni-Cr film
05/15/2013CN103107084A Etching process method of polycide insulator polycide (PIP) polycrystalline silicon
05/15/2013CN103107083A Function coating imaging-self method of polydimethylsiloxane three-dimensional structure
05/15/2013CN103107082A Method and system for ion beam delayering of a sample and control thereof
05/15/2013CN103107081A Sharp corner passivation method
05/15/2013CN103107080A Etching method for solving glue pasting problem on surface of wafer in deep-groove etching process
05/15/2013CN103107079A Apparatus and method for the treatment of flat substrates
05/15/2013CN103107078A Optical device wafer processing method
05/15/2013CN103107077A Graphene device and manufacturing method thereof
05/15/2013CN103107076A Manufacturing method of separate grid type flash memory and memory set
05/15/2013CN103107075A Formation method of metal grid electrode
05/15/2013CN103107074A Metal grid forming method
05/15/2013CN103107073A Formation method of metal grid electrode
05/15/2013CN103107072A Manufacturing method of multi-grid field effect transistor component
05/15/2013CN103107071A Method of single nanobelt precisely doped with ion beam
05/15/2013CN103107070A Semiconductor device and epitaxial layer manufacturing method
05/15/2013CN103107069A Silicon slice eutectic bonding method
05/15/2013CN103107068A Nickel (Ni) film annealing side gate graphene transistor preparation method based on reaction of silicon carbide (SiC) and chlorine gas
05/15/2013CN103107067A Manufacturing craft method of semi-conductor double layer protection layer
05/15/2013CN103107066A Photoresist removal method and semiconductor production method
05/15/2013CN103107065A Nanowire device preparation method based on nanowire ordered arrangement
05/15/2013CN103106917A Semiconductor manufacturing method
05/15/2013CN103105744A Etch features with reduced line edge roughness
05/15/2013CN103105736A Photolithography method and etching method
05/15/2013CN103105729A Photolithography method capable of preventing ground silicon dust from polluting wafers
05/15/2013CN103105725A Conductive element for electrically coupling an EUVL mask to a supporting chuck
05/15/2013CN103105706A Display panel and manufacture method thereof
05/15/2013CN103103620A Connecting structure of phosphorus diffusion furnace exhaust tube and sealing water tank
05/15/2013CN103103619A Buffer tank of phosphorus diffusion furnace exhaust tube
05/15/2013CN103103618A Sealing water tank of phosphorus diffusion furnace exhaust tube
05/15/2013CN103103617A Exhaust tube of phosphorus diffusion furnace
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