Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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04/08/1998 | EP0834190A2 Method for shallow junction formation |
04/08/1998 | EP0834189A1 Manufacture of a semiconductor device with an epitaxial semiconductor zone |
04/08/1998 | EP0834188A1 Method and apparatus for controlling a temperature of a wafer |
04/08/1998 | EP0834100A1 Photolithographic apparatus |
04/08/1998 | EP0834082A1 Performance driven bist technique |
04/08/1998 | EP0760159A4 Fast magnetic scanning of heavy ion beams |
04/08/1998 | CN1178600A Multilayered electrostatic chuck and method of manufacture thereof |
04/08/1998 | CN1178445A Stability enhancement of molten solder droplets as ejected from nozzle of droplet pump |
04/08/1998 | CN1178393A Method for making bit lines on capacitor array of memory unit |
04/08/1998 | CN1178392A Electrostatic chucks and method and apparatus for treating samples using the chucks |
04/08/1998 | CN1178391A Heat treating apparatus for mercury self sealed mercury-cadmium tellurid for switching transistors |
04/08/1998 | CN1178390A Wet processing apparatus with movable partitioning plate between two processing chambers |
04/08/1998 | CN1178389A Semiconductor IC device having discontinuous insulating regions and manufacturing method thereof |
04/08/1998 | CN1178378A Nonvolatile memory device |
04/08/1998 | CN1178377A Memory, semiconductor, data processor and computer system |
04/08/1998 | CN1178307A Dry air generator without Chemical substances |
04/08/1998 | CN1178264A Oxide single crystal and method of manufacturing thereof |
04/07/1998 | US5737766 Programmable gate array configuration memory which allows sharing with user memory |
04/07/1998 | US5737587 Resynchronization circuit for circuit module architecture |
04/07/1998 | US5737441 Aligning method and apparatus |
04/07/1998 | US5737351 Semiconductor laser including ridge structure extending between window regions |
04/07/1998 | US5737281 Data writing method and device of semiconductor device |
04/07/1998 | US5737264 Non-volatile semiconductor memory cell |
04/07/1998 | US5737263 Semiconductor memory of high integration, large capacity, and low power consumption |
04/07/1998 | US5737261 Non-volatile ferroelectric memory utilizing residual polarization of a ferroelectric film |
04/07/1998 | US5737260 Dual mode ferroelectric memory reference scheme |
04/07/1998 | US5737250 Method and system for simulating ion implantation for performing simulation with avoiding overflow by adjusting memory consuming amount |
04/07/1998 | US5737233 VLSI circuit layout method based on spreading functions and simulated annealing heuristics to minimize area |
04/07/1998 | US5737191 Structure and process for mounting semiconductor chip |
04/07/1998 | US5737178 Monocrystalline ceramic coating having integral bonding interconnects for electrostatic chucks |
04/07/1998 | US5737177 Apparatus and method for actively controlling the DC potential of a cathode pedestal |
04/07/1998 | US5737175 Bias-tracking D.C. power circuit for an electrostatic chuck |
04/07/1998 | US5737072 Automated photomask inspection apparatus and method |
04/07/1998 | US5737053 Wire substrate having branch lines perpendicular to the main lines in which the branch lines connect to driving circuits on a display device |
04/07/1998 | US5736849 Semiconductor device and test method for connection between semiconductor devices |
04/07/1998 | US5736792 Semiconductor device |
04/07/1998 | US5736791 Semiconductor device and bonding pad structure therefor |
04/07/1998 | US5736789 Ball grid array casing for integrated circuits |
04/07/1998 | US5736783 High frequency microelectronics package |
04/07/1998 | US5736779 Semiconductor device with Zener diode for gate protection, and method for fabricating the same |
04/07/1998 | US5736776 Semiconductor device and method of manufacturing the same |
04/07/1998 | US5736775 Semiconductor device having a concentration peak position coinciding with a channel stopper |
04/07/1998 | US5736774 High voltage integrated circuit, and high voltage level shift unit used for the same |
04/07/1998 | US5736772 Integrated circuit field effect transistor |
04/07/1998 | US5736770 Semiconductor device with conductive connecting layer and abutting insulator section made of oxide of same material |
04/07/1998 | US5736769 Semiconductor apparatus |
04/07/1998 | US5736768 Semiconductor device on a substrate or a matrix display panel |
04/07/1998 | US5736767 Semiconductor device including a CMOSFET of a single-gate |
04/07/1998 | US5736766 Medium voltage LDMOS device and method of fabrication |
04/07/1998 | US5736765 EEPROM cell having improved topology and reduced leakage current |
04/07/1998 | US5736764 PMOS flash EEPROM cell with single poly |
04/07/1998 | US5736761 DRAM cell arrangement and method for its manufacture |
04/07/1998 | US5736759 Reduced fatigue ferroelectric element |
04/07/1998 | US5736753 Semiconductor device for improved power conversion having a hexagonal-system single-crystal silicon carbide |
04/07/1998 | US5736751 Field effect transistor having thick source and drain regions |
04/07/1998 | US5736750 MIS semiconductor device and method of fabricating the same |
04/07/1998 | US5736749 Semiconductor device |
04/07/1998 | US5736743 Method and apparatus for ion beam formation in an ion implanter |
04/07/1998 | US5736646 Circuit board assembly torsion tester and method |
04/07/1998 | US5736607 Hermetically sealed dies and die attach materials |
04/07/1998 | US5736464 Process and apparatus for producing a functional structure of a semiconductor component |
04/07/1998 | US5736463 Applying slurry, pressing and rotating shape memory material polishing pad relative to surface; for silicon wafers |
04/07/1998 | US5736462 Method of etching back layer on substrate |
04/07/1998 | US5736461 Preventing oxidation by overcoating titanium nitride layer, heating to react with silicon substrate |
04/07/1998 | US5736460 Forming insulation layer on semiconductor substrate, forming metal layer, forming photoresist, forming gold interconnectors, removing photoresist, removing metal layer, coating insulation layer over interconnectors |
04/07/1998 | US5736459 Method to fabricate a polysilicon stud using an oxygen ion implantation procedure |
04/07/1998 | US5736458 Method for improved aluminium-copper deposition and robust via contact resistance |
04/07/1998 | US5736457 Method of making a damascene metallization |
04/07/1998 | US5736456 Method of forming conductive bumps on die for flip chip applications |
04/07/1998 | US5736455 Method for passivating the sidewalls of a tungsten word line |
04/07/1998 | US5736454 Method for making a silicon dioxide layer on a silicon substrate by pure water anodization followed by rapid thermal densification |
04/07/1998 | US5736453 Method for dividing plural semiconductor devices formed on single wafer into individual semiconductor devices |
04/07/1998 | US5736452 Method of manufacturing a hybrid integrated circuit |
04/07/1998 | US5736451 Method of forming planar isolation in integrated circuits |
04/07/1998 | US5736450 Method for forming a cylindrical capacitor |
04/07/1998 | US5736449 Semiconductor memory device having improved isolation between electrodes, and process for fabricating the same |
04/07/1998 | US5736447 Conductive layers are formed insitu polysilicon doping, patterning to form an emitter |
04/07/1998 | US5736446 Method of fabricating a MOS device having a gate-side air-gap structure |
04/07/1998 | US5736445 Method for producing at least two transsistors in a semiconductor body |
04/07/1998 | US5736444 Methods of forming non-volatile memory arrays |
04/07/1998 | US5736443 Flash EEPROM cell and method of manufacturing the same |
04/07/1998 | US5736442 Forming protective insulating film made of same material as isolating film on conductive layer, forming oxide film at electrode facings of gate electrodes, etching, |
04/07/1998 | US5736441 Forming oxide layer and a transistor having gate layer and a source/drain region of silicon substrate, multilayer of silicon oxide and nitride over gate, silicon nitride spacer, an insulating layer, a self-aligned mask, a capacitor |
04/07/1998 | US5736440 Semiconductor processing method of forming complementary NMOS and PMOS field effect transistors on a substrate |
04/07/1998 | US5736439 Heating at the second temperature higher than the first temperature |
04/07/1998 | US5736438 Field effect thin-film transistor and method of manufacturing the same as well as semiconductor device provided with the same |
04/07/1998 | US5736437 Method of fabricating a bottom and top gated thin film transistor having an electrical sidewall connection |
04/07/1998 | US5736436 Method of making a thin film transistor panel |
04/07/1998 | US5736435 Process for fabricating a fully self-aligned soi mosfet |
04/07/1998 | US5736434 Forming gate electrode, applying voltage between electrode and cathode, maintaining voltage, forming anodic oxide film, forming channel |
04/07/1998 | US5736433 Double mask hermetic passivation method providing enhanced resistance to moisture |
04/07/1998 | US5736429 Method of forming a layer of silica to be eliminated subsequently and method for mounting an integrated optical component |
04/07/1998 | US5736428 Process for manufacturing a semiconductor device having a stepped encapsulated package |
04/07/1998 | US5736425 Coating an aerogel sol with solvent, gelation, drying |
04/07/1998 | US5736424 Device fabrication involving planarization |
04/07/1998 | US5736423 Plama enhanced chemical vapor deposition using high frequency power and pressure and increasing the time duration of precoat and soak time steps; applying silane, nitrous oxide and introgen as reactant gases |
04/07/1998 | US5736422 Forming a dielectric oxide film on silicon substrate, an oxygen contining platinum oxide layer in presence of oxygen, depositing platinum under inert atmosphere, removing oxygen adhered to platinum oxide by annaling the substrate |
04/07/1998 | US5736421 Forming dielectric capacitor on lower electrodes by anisotropic etching a photoresist masked dielectric layer |
04/07/1998 | US5736420 Defining active regions, forming patterned layer of conductive material, forming source and drain regions, doping, forming gettering layer, stress reduction layer, metallizing |
04/07/1998 | US5736419 Doping the polysilicon layer by forming phosphorus oxychloride layer and thermally driving the phosphorus from the above layer into underlying polysilicon gate and sourc/drain poly region to achive desired dopant level |