Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2002
07/25/2002WO2001098793A3 Systems for testing integraged circuits during burn-in
07/25/2002WO2001089767A3 A chemical-mechanical polishing system for the manufacture of semiconductor devices
07/25/2002WO2001087534A3 Method and system for precisely positioning a waist of a material-processing laser beam to process microstructures within a laser-processing site
07/25/2002WO2001082362B1 Process for forming electrical/mechanical connections
07/25/2002WO2001081970A3 Apparatus, system, and method for precision positioning and alignment of a lens in an optical system
07/25/2002WO2001075938A3 Leadless semiconductor product packaging apparatus having a window lid and method for packaging
07/25/2002WO2001073865A3 Continuous processing of thin-film batteries and like devices
07/25/2002WO2001004926A9 Methods and apparatus for alignment of ion beam systems using beam current sensors
07/25/2002WO2001004652A9 Apparatus for electrical testing of a substrate having a plurality of terminals
07/25/2002WO2001002108A9 Fluid heating system for processing semiconductor materials
07/25/2002US20020100013 Exposure processing method and exposure system for the same
07/25/2002US20020100012 Focus monitoring method, exposure apparatus, and exposure mask
07/25/2002US20020099995 Marking of and searching for initial defective blocks in semiconductor memory
07/25/2002US20020099989 Automatic circuit generation system and automatic circuit generation method and automatic circuit generation program
07/25/2002US20020099475 Method and device for vibration control
07/25/2002US20020099470 Wafer handling system
07/25/2002US20020099469 Vacuum processing apparatus and semiconductor manufacturing line using the same
07/25/2002US20020098787 Polishing apparatus
07/25/2002US20020098786 Retention plate for polishing semiconductor substrate
07/25/2002US20020098784 Abrasive free polishing in copper damascene applications
07/25/2002US20020098782 Polishing pads and methods relating thereto
07/25/2002US20020098780 Apparatus for polishing a semiconductor wafer and method therefor
07/25/2002US20020098779 Method and apparatus for enhanced CMP using metals having reductive properties
07/25/2002US20020098778 Polishing pad, polishing apparatus and polishing method using the same
07/25/2002US20020098777 Multizone carrier with process monitoring system for chemical-mechanical planarization tool
07/25/2002US20020098716 Method of making vertical diode structures
07/25/2002US20020098715 High-pressure anneal process for integrated circuits
07/25/2002US20020098714 Method for fabricating an ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device
07/25/2002US20020098713 Clustertool system software using plasma immersion ion implantation
07/25/2002US20020098712 Multi-thickness oxide growth with in-situ scanned laser heating
07/25/2002US20020098711 Electroless deposition of doped noble metals and noble metal alloys
07/25/2002US20020098710 Methods Of Forming Transistors
07/25/2002US20020098709 Method for removing photoresist layer on wafer edge
07/25/2002US20020098708 Method and apparatus for dry etching
07/25/2002US20020098707 Design of lithography alignment and overlay measurement marks on CMP finished damascene surface
07/25/2002US20020098706 Comprises simultaneous application of ultraviolet radiation and hydrogen peroxide and dissolved ozone
07/25/2002US20020098705 Single step chemical mechanical polish process to improve the surface roughness in MRAM technology
07/25/2002US20020098704 Method for fabrication of a contact plug in an embedded memory
07/25/2002US20020098703 Method for fabricating a MOS transistor of an embedded memory
07/25/2002US20020098702 Apparatus and methods for chemical-mechanical polishing of semiconductor wafers
07/25/2002US20020098701 Polishing method
07/25/2002US20020098699 Method of forming a bit line and a node contact hole
07/25/2002US20020098698 Method for polishing semiconductor device
07/25/2002US20020098697 Composition for polishing semiconductor wafer, semiconductor circuit wafer, and method for producing the same
07/25/2002US20020098695 Method of manufaturing crystalline semiconductor material and method of manufaturing semiconductor device
07/25/2002US20020098694 Method of making a local interconnect in an embedded memory
07/25/2002US20020098693 Single step pendeo- and lateral epitaxial overgrowth of group III-nitride epitaxial layers with group III-nitride buffer layer and resulting structures
07/25/2002US20020098692 Semiconductor device and method for manufacturing same
07/25/2002US20020098691 Method of manufacturing a semiconductor device and the semiconductor device manufactured by the method
07/25/2002US20020098690 Methods of forming semiconductor structures
07/25/2002US20020098689 Formation of silicided shallow junctions using implant through metal technology and laser annealing process
07/25/2002US20020098688 Semiconductor device having a self-aligned contact hole
07/25/2002US20020098687 Method of automatically defining a landing via
07/25/2002US20020098686 Semiconductor device and fabrication process therefor
07/25/2002US20020098685 In situ reduction of copper oxide prior to silicon carbide deposition
07/25/2002US20020098684 Low k interlevel dielectric layer fabrication methods
07/25/2002US20020098683 Semiconductor device manufacturing method using metal silicide reaction after ion implantation in silicon wiring
07/25/2002US20020098682 Semiconductor device fabrication method
07/25/2002US20020098681 Reduced electromigration and stressed induced migration of Cu wires by surface coating
07/25/2002US20020098680 Integrated circuit trenched features and method of producing same
07/25/2002US20020098679 Method for producing an integrated circuit having at least one metalicized surface
07/25/2002US20020098678 Method of forming conductive layers in the trenches or through holes made in an insulating film on a semiconductor substrate
07/25/2002US20020098677 Multilevel copper interconnects with low-k dielectrics and air gaps
07/25/2002US20020098676 Metal hard mask for ild rie processing of semiconductor memory devices to prevent oxidation of conductive lines
07/25/2002US20020098675 Chemical mechanical polishing method for fabricating cooper damascene structure
07/25/2002US20020098674 Method of manufacturing semicondutor device
07/25/2002US20020098673 Method for fabricating metal interconnects
07/25/2002US20020098672 Semiconductor device with fully self-aligned local interconnects, and method for fabricating the device
07/25/2002US20020098671 Method of forming silicon-germanium film
07/25/2002US20020098670 Semiconductor integrated circuit device and fabrication method for semiconductor integrated circuit device
07/25/2002US20020098669 Gate electrode having agglomeration prevention layer on metal silicide layer, and method for forming the same
07/25/2002US20020098667 Technique to produce isolated junctions by forming an insulation layer
07/25/2002US20020098666 Compound semiconductor device manufacturing method
07/25/2002US20020098665 Method for manufacturing semiconductor circuit
07/25/2002US20020098664 Method of producing SOI materials
07/25/2002US20020098663 Manufacturing method of a semiconductor device
07/25/2002US20020098662 Chemical treatment of semiconductor substrates
07/25/2002US20020098661 Simplified method to reduce or eliminate sti oxide divots
07/25/2002US20020098660 Method for forming trench isolation
07/25/2002US20020098659 Method for forming steep spacer in a MOS device
07/25/2002US20020098658 Metal-insulator-semiconductor field effect transistor having an oxidized aluminum nitride gate insulator formed on a gallium nitride or silicon substrate, and method of making the same
07/25/2002US20020098657 Structure and process flow for fabrication of dual gate floating body integrated MOS transistors
07/25/2002US20020098656 Method of fabricating semiconductor device
07/25/2002US20020098655 Method to form very high mobility vertical channel transistor by selective deposition of SiGe or multi-quantum wells (MQWs)
07/25/2002US20020098654 Method of forming a contact structure and a container capacitor structure
07/25/2002US20020098653 Aerosol process for fabricating discontinuous floating gate microelectronic devices
07/25/2002US20020098652 Semiconductor device having MISFETs
07/25/2002US20020098651 Ggeneration of heat can be suppressed even if the substrate is provided on the base with the opposite side of the emitting portion of the substrate facing the base.
07/25/2002US20020098650 Method for making an embedded memory MOS
07/25/2002US20020098649 Method for fabricating a mos transistor of an embedded memory
07/25/2002US20020098648 Method for fabricating a nonvolatile semiconductor memory cell
07/25/2002US20020098647 Split gate field effect transistor (fet) device employing non-linear polysilicon floating gate electrode dopant profile
07/25/2002US20020098646 Method of manufacturing semiconductor device
07/25/2002US20020098645 Triple metal line 1T/1C ferroelectric memory device and method for fabrication thereof
07/25/2002US20020098644 Semiconductor device and method for manufacturing the same
07/25/2002US20020098643 Method of manufacturing SOI element having body contact
07/25/2002US20020098642 Methods of fabricating a metal-oxide-metal capacitor and associated apparatuses
07/25/2002US20020098641 Semiconductor substrate, light-emitting device, and method for producing the same
07/25/2002US20020098640 Method for forming self aligned contacts
07/25/2002US20020098639 Method of manufacturing semiconductor memory device and semiconductor memory device