Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2002
12/10/2002US6492850 Semiconductor integrated circuit and method for generating internal supply voltage in semiconductor integrated circuit
12/10/2002US6492832 Methods for testing a group of semiconductor devices simultaneously, and devices amenable to such methods of testing
12/10/2002US6492829 Contactor for inspection
12/10/2002US6492827 Non-invasive electrical measurement of semiconductor wafers
12/10/2002US6492822 Wafer probe station for low-current measurements
12/10/2002US6492774 Wafer area pressure control for plasma confinement
12/10/2002US6492739 Semiconductor device having bumper portions integral with a heat sink
12/10/2002US6492738 Apparatus and methods of testing and assembling bumped devices using an anisotropically conductive layer
12/10/2002US6492737 Electronic device and a method of manufacturing the same
12/10/2002US6492735 Semiconductor device with alloy film between barrier metal and interconnect
12/10/2002US6492734 Semiconductor device including damascene wiring and a manufacturing method thereof
12/10/2002US6492732 Interconnect structure with air gap compatible with unlanded vias
12/10/2002US6492731 Composite low dielectric constant film for integrated circuit structure
12/10/2002US6492730 Method for fabricating semiconductor integrated circuit
12/10/2002US6492729 Configuration and method for connecting conductor tracks
12/10/2002US6492724 Structure for reinforcing a semiconductor device to prevent cracking
12/10/2002US6492722 Metallized interconnection structure
12/10/2002US6492715 Integrated semiconductor package
12/10/2002US6492714 Semiconductor device and semiconductor module
12/10/2002US6492713 Gravitationally assisted control of spread of viscous material applied to semiconductor assembly components
12/10/2002US6492712 High quality oxide for use in integrated circuits
12/10/2002US6492711 Heterojunction bipolar transistor and method for fabricating the same
12/10/2002US6492710 Substrate isolated transistor
12/10/2002US6492708 Integrated coil inductors for IC devices
12/10/2002US6492707 Semiconductor integrated circuit device with pad impedance adjustment mechanism
12/10/2002US6492705 Integrated circuit air bridge structures and methods of fabricating same
12/10/2002US6492701 Semiconductor device having anti-reflective cap and spacer, method of manufacturing the same, and method of manufacturing photoresist pattern using the same
12/10/2002US6492696 Semiconductor device and process of manufacturing the same
12/10/2002US6492695 Semiconductor arrangement with transistor gate insulator
12/10/2002US6492694 Highly conductive composite polysilicon gate for CMOS integrated circuits
12/10/2002US6492693 Low voltage high performance semiconductor devices and methods
12/10/2002US6492692 Semiconductor integrated circuit and manufacturing method therefore
12/10/2002US6492690 Semiconductor device having control electrodes with different impurity concentrations
12/10/2002US6492689 Semiconductor device switching regulator used as a DC regulated power supply
12/10/2002US6492688 Dual work function CMOS device
12/10/2002US6492685 Semiconductor device having a pair of N-channel TFT and P-channel TFT
12/10/2002US6492684 Silicon-on-insulator chip having an isolation barrier for reliability
12/10/2002US6492683 Semiconductor device with SOI structure and method of manufacturing the same
12/10/2002US6492682 Soi (silicon on insulator) has a buried oxide film as a insulator film right below a silicon layer, and is expected to be a silicon material for high speed device with electric power saving performance
12/10/2002US6492681 Semiconductor device
12/10/2002US6492680 Semiconductor integrated circuit device
12/10/2002US6492677 Non-volatile semiconductor memory device and fabrication process thereof
12/10/2002US6492676 Semiconductor device having gate electrode in which depletion layer can be generated
12/10/2002US6492675 Flash memory array with dual function control lines and asymmetrical source and drain junctions
12/10/2002US6492674 Semiconductor device having an improved plug structure and method of manufacturing the same
12/10/2002US6492673 Charge pump or other charge storage capacitor including PZT layer for combined use as encapsulation layer and dielectric layer of ferroelectric capacitor and a method for manufacturing the same
12/10/2002US6492672 Semiconductor device
12/10/2002US6492671 CMOS process
12/10/2002US6492670 Locally confined deep pocket process for ULSI MOSFETS
12/10/2002US6492669 Semiconductor device with schottky electrode having high schottky barrier
12/10/2002US6492667 Radio frequency semiconductor apparatus
12/10/2002US6492666 Semiconductor wafer with scribe lines having inspection pads formed thereon
12/10/2002US6492665 Semiconductor device
12/10/2002US6492664 Heterojunction bipolar transistor with reduced offset voltage
12/10/2002US6492662 T-RAM structure having dual vertical devices and method for fabricating the same
12/10/2002US6492659 Semiconductor device having single crystal grains with hydrogen and tapered gate insulation layer
12/10/2002US6492648 Lamp annealing apparatus and method of manufacturing semiconductor device
12/10/2002US6492647 Electron guns for lithography tools
12/10/2002US6492625 Apparatus and method for controlling temperature uniformity of substrates
12/10/2002US6492621 Hot wall rapid thermal processor
12/10/2002US6492616 Processes for laser beam machining of resin film for wiring boards and manufacture of wiring boards
12/10/2002US6492612 Plasma apparatus and lower electrode thereof
12/10/2002US6492600 Laminate having plated microvia interconnects and method for forming the same
12/10/2002US6492599 Multilayer wiring board, manufacturing method thereof, and wafer block contact board
12/10/2002US6492593 Gold wire for semiconductor element connection, used for electrical connection of external leads and the like to electrodes on semiconductor elements; suitable for narrow pitch connections and thin electrode connections
12/10/2002US6492441 Diazonapthoquinonesulfonyl-substituted polymer suitable for use in anti-reflective coating of a semiconductor device
12/10/2002US6492438 Electrically connectable adhesive agent for semiconductor
12/10/2002US6492311 Ethyenediaminetetraacetic acid or its ammonium salt semiconductor process residue removal composition and process
12/10/2002US6492310 Boric acid containing compositions for stripping residues from semiconductor substrates
12/10/2002US6492309 Fluorinated solvent compositions containing hydrogen fluoride
12/10/2002US6492308 Post chemical-mechanical planarization (CMP) cleaning composition
12/10/2002US6492285 High-pressure anneal process for integrated circuits
12/10/2002US6492284 Reactor for processing a workpiece using sonic energy
12/10/2002US6492283 Method of forming ultrathin oxide layer
12/10/2002US6492282 Integrated circuits and manufacturing methods
12/10/2002US6492281 Method of fabricating conductor structures with metal comb bridging avoidance
12/10/2002US6492280 Method and apparatus for etching a semiconductor wafer with features having vertical sidewalls
12/10/2002US6492279 Plasma etching methods
12/10/2002US6492278 Method of manufacturing semiconductor device
12/10/2002US6492277 Specimen surface processing method and apparatus
12/10/2002US6492276 Hard masking method for forming residue free oxygen containing plasma etched layer
12/10/2002US6492275 Control of transistor performance through adjustment of spacer oxide profile with a wet etch
12/10/2002US6492274 Slurries of abrasive inorganic oxide particles and method for adjusting the abrasiveness of the particles
12/10/2002US6492273 Methods and apparatuses for monitoring and controlling mechanical or chemical-mechanical planarization of microelectronic substrate assemblies
12/10/2002US6492272 Carrier gas modification for use in plasma ashing of photoresist
12/10/2002US6492271 Semiconductor device and method of manufacturing the same
12/10/2002US6492270 Method for forming copper dual damascene
12/10/2002US6492269 Methods for edge alignment mark protection during damascene electrochemical plating of copper
12/10/2002US6492268 Method of forming a copper wiring in a semiconductor device
12/10/2002US6492267 Low temperature nitride used as Cu barrier layer
12/10/2002US6492266 Method of forming reliable capped copper interconnects
12/10/2002US6492264 Semiconductor device having a silicide layer with silicon-rich region and method for making the same
12/10/2002US6492263 Dual damascene process which prevents diffusion of metals and improves trench-to-via alignment
12/10/2002US6492262 Process and structure for an interlock and high performance multilevel structures for chip interconnects and packaging technologies
12/10/2002US6492261 Focused ion beam metal deposition
12/10/2002US6492260 Method of fabricating damascene metal wiring
12/10/2002US6492258 METHOD FOR REDUCING STRESS-INDUCED VOIDS FOR 0.25-μM AND SMALLER SEMICONDUCTOR CHIP TECHNOLOGY BY ANNEALING INTERCONNECT LINES AND USING LOW BIAS VOLTAGE AND LOW INTERLAYER DIELECTRIC DEPOSITION RATE AND SEMICONDUCTOR CHIP MADE THEREBY
12/10/2002US6492257 Water vapor plasma for effective low-k dielectric resist stripping
12/10/2002US6492256 Method for forming an interconnect structure with air gap compatible with unlanded vias
12/10/2002US6492255 Semiconductor chip and method manufacturing the same