| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 02/03/2004 | US6686631 Negative differential resistance (NDR) device and method of operating same |
| 02/03/2004 | US6686630 Short-channel effects are suppressed; semiconducting silicon-on-insulator wafer sandwiched between gate dielectrics; doped backside gate electrode formed beneath channel region |
| 02/03/2004 | US6686629 SOI MOSFETS exhibiting reduced floating-body effects |
| 02/03/2004 | US6686628 Low-resistance gate transistor and method for fabricating the same |
| 02/03/2004 | US6686627 Multiple conductive plug structure for lateral RF MOS devices |
| 02/03/2004 | US6686626 Source-down power transistor |
| 02/03/2004 | US6686624 Vertical one-transistor floating-body DRAM cell in bulk CMOS process with electrically isolated charge storage region |
| 02/03/2004 | US6686623 Nonvolatile memory and electronic apparatus |
| 02/03/2004 | US6686622 Semiconductor memory device and manufacturing method thereof |
| 02/03/2004 | US6686621 Semiconductor device |
| 02/03/2004 | US6686620 FRAM and method of fabricating the same |
| 02/03/2004 | US6686619 Dynamic random access memory with improved contact arrangements |
| 02/03/2004 | US6686617 Semiconductor chip having both compact memory and high performance logic |
| 02/03/2004 | US6686616 Silicon carbide metal-semiconductor field effect transistors |
| 02/03/2004 | US6686615 Flip-chip type semiconductor device for reducing signal skew |
| 02/03/2004 | US6686614 Semiconductor switching element with integrated Schottky diode and process for producing the switching element and diode |
| 02/03/2004 | US6686613 Punch through type power device |
| 02/03/2004 | US6686611 Nitride semiconductor and a method thereof, a nitride semiconductor device and a method thereof |
| 02/03/2004 | US6686607 Structure and method for mounting a semiconductor element |
| 02/03/2004 | US6686606 Composition for a wiring, a wiring using the composition, manufacturing method thereof, a display using the wiring and a manufacturing method thereof |
| 02/03/2004 | US6686605 Semiconductor device, display device, and method of manufacturing the same |
| 02/03/2004 | US6686604 Multiple operating voltage vertical replacement-gate (VRG) transistor |
| 02/03/2004 | US6686600 TEM sample slicing process |
| 02/03/2004 | US6686599 Ion production device for ion beam irradiation apparatus |
| 02/03/2004 | US6686598 Wafer clamping apparatus and method |
| 02/03/2004 | US6686597 Substrate rotating device, and manufacturing method and apparatus of recording medium master |
| 02/03/2004 | US6686571 Temperature sensor attached to cooling plate |
| 02/03/2004 | US6686570 Hot plate unit |
| 02/03/2004 | US6686565 Method of an apparatus for heating a substrate |
| 02/03/2004 | US6686322 Cleaning agent and cleaning process using the same |
| 02/03/2004 | US6686300 Sub-critical-dimension integrated circuit features |
| 02/03/2004 | US6686298 Methods of forming structures over semiconductor substrates, and methods of forming transistors associated with semiconductor substrates |
| 02/03/2004 | US6686297 Method of manufacturing a semiconductor device and apparatus to be used therefore |
| 02/03/2004 | US6686296 Nitrogen-based highly polymerizing plasma process for etching of organic materials in semiconductor manufacturing |
| 02/03/2004 | US6686295 Anisotropic etch method |
| 02/03/2004 | US6686294 Method and apparatus for etching silicon nitride film and manufacturing method of semiconductor device |
| 02/03/2004 | US6686293 Method of etching a trench in a silicon-containing dielectric material |
| 02/03/2004 | US6686292 Plasma etch method for forming uniform linewidth residue free patterned composite silicon containing dielectric layer/silicon stack layer |
| 02/03/2004 | US6686290 Method of forming a fine pattern |
| 02/03/2004 | US6686289 Method for minimizing variation in etch rate of semiconductor wafer caused by variation in mask pattern density |
| 02/03/2004 | US6686288 Integrated circuit having self-aligned CVD-tungsten/titanium contact plugs strapped with metal interconnect and method of manufacture |
| 02/03/2004 | US6686287 Semiconductor device manufacturing method and apparatus |
| 02/03/2004 | US6686286 Method for forming a borderless contact of a semiconductor device |
| 02/03/2004 | US6686285 Semiconductor device manufacture method preventing dishing and erosion during chemical mechanical polishing |
| 02/03/2004 | US6686284 Chemical mechanical polisher equipped with chilled retaining ring and method of using |
| 02/03/2004 | US6686283 Shallow trench isolation planarization using self aligned isotropic etch |
| 02/03/2004 | US6686282 Plated metal transistor gate and method of formation |
| 02/03/2004 | US6686281 Method for fabricating a semiconductor device and a substrate processing apparatus |
| 02/03/2004 | US6686280 Sidewall coverage for copper damascene filling |
| 02/03/2004 | US6686279 Method for reducing gouging during via formation |
| 02/03/2004 | US6686278 Method for forming a plug metal layer |
| 02/03/2004 | US6686277 Method of manufacturing semiconductor device |
| 02/03/2004 | US6686276 Semiconductor chip having both polycide and salicide gates and methods for making same |
| 02/03/2004 | US6686275 Method of selectively removing metal nitride or metal oxynitride extrusions from a semmiconductor structure |
| 02/03/2004 | US6686274 Semiconductor device having cobalt silicide film in which diffusion of cobalt atoms is inhibited and its production process |
| 02/03/2004 | US6686273 Method of fabricating copper interconnects with very low-k inter-level insulator |
| 02/03/2004 | US6686272 Anti-reflective coatings for use at 248 nm and 193 nm |
| 02/03/2004 | US6686271 Protective layers prior to alternating layer deposition |
| 02/03/2004 | US6686270 Dual damascene trench depth monitoring |
| 02/03/2004 | US6686269 Semiconductor device having improved contact hole structure, and method of manufacturing the same |
| 02/03/2004 | US6686268 Method of forming overmolded chip scale package and resulting product |
| 02/03/2004 | US6686267 Method for fabricating a dual mode FET and logic circuit having negative differential resistance mode |
| 02/03/2004 | US6686266 Method for forming a fuse in a semiconductor device |
| 02/03/2004 | US6686265 Method of producing a capacitor electrode with a barrier structure |
| 02/03/2004 | US6686264 Methods of forming binary noncrystalline oxide analogs of silicon dioxide |
| 02/03/2004 | US6686262 Process for producing a photoelectric conversion device |
| 02/03/2004 | US6686261 Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on sapphire substrates, and gallium nitride semiconductor structures fabricated thereby |
| 02/03/2004 | US6686260 Process for producing thermally annealed wafers having improved internal gettering |
| 02/03/2004 | US6686259 Method for manufacturing solid state image pick-up device |
| 02/03/2004 | US6686258 Method of trimming and singulating leaded semiconductor packages |
| 02/03/2004 | US6686257 Method for transferring epitaxy layer |
| 02/03/2004 | US6686255 Amorphizing ion implant local oxidation of silicon (LOCOS) method for forming an isolation region |
| 02/03/2004 | US6686254 Semiconductor structure and method for reducing charge damage |
| 02/03/2004 | US6686252 Method and structure to reduce CMOS inter-well leakage |
| 02/03/2004 | US6686251 Method for fabricating a bipolar transistor having self-aligned emitter and base |
| 02/03/2004 | US6686250 Method of forming self-aligned bipolar transistor |
| 02/03/2004 | US6686248 Method of fabricating a semiconductor device having a MOS transistor with a high dielectric constant material |
| 02/03/2004 | US6686247 Self-aligned contacts to gates |
| 02/03/2004 | US6686246 Method of fabricating a DRAM transistor with a dual gate oxide technique |
| 02/03/2004 | US6686244 Power semiconductor device having a voltage sustaining region that includes doped columns formed with a single ion implantation step |
| 02/03/2004 | US6686243 Fabrication method for flash memory |
| 02/03/2004 | US6686242 Method for producing metallic bit lines for memory cell arrays, method for producing memory cell arrays and memory cell array |
| 02/03/2004 | US6686241 Method of forming low-resistivity connections in non-volatile memories |
| 02/03/2004 | US6686240 Semiconductor memory device having a multiple tunnel junction layer pattern and method of fabricating the same |
| 02/03/2004 | US6686239 Capacitors of semiconductor devices and methods of fabricating the same |
| 02/03/2004 | US6686238 Method of forming a semiconductor memory device |
| 02/03/2004 | US6686237 High precision integrated circuit capacitors |
| 02/03/2004 | US6686236 Methods of preventing reduction of IrOx during PZT formation by metalorganic chemical vapor deposition or other processing |
| 02/03/2004 | US6686235 Buried digit spacer-separated capacitor array |
| 02/03/2004 | US6686234 Semiconductor device and method for fabricating the same |
| 02/03/2004 | US6686233 High voltage and low voltage components integrated into a single metal oxide semiconductor (mos) process through the sole adding of a mask step and an ion implantation step |
| 02/03/2004 | US6686232 Ultra low deposition rate PECVD silicon nitride |
| 02/03/2004 | US6686231 Damascene gate process with sacrificial oxide in semiconductor devices |
| 02/03/2004 | US6686230 Semiconducting devices and method of making thereof |
| 02/03/2004 | US6686229 Thin film transistors and method of manufacture |
| 02/03/2004 | US6686228 Semiconductor device and manufacturing method thereof |
| 02/03/2004 | US6686227 Method and system for exposed die molding for integrated circuit packaging |
| 02/03/2004 | US6686226 Method of manufacturing a semiconductor device a ball grid array package structure using a supporting frame |
| 02/03/2004 | US6686225 Method of separating semiconductor dies from a wafer |
| 02/03/2004 | US6686224 Chip manufacturing method for cutting test pads from integrated circuits by sectioning circuit chips from circuit substrate |