Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/2004
02/10/2004US6690012 Hybridized lead-salt infrared radiation detectors and methods of formation
02/10/2004US6690010 Chemical analysis of defects using electron appearance spectroscopy
02/10/2004US6690009 Method of determining the charge carrier concentration in materials, notably semiconductors
02/10/2004US6690008 Probe and method of manufacturing mounted AFM probes
02/10/2004US6689984 Susceptor with built-in electrode and manufacturing method therefor
02/10/2004US6689930 Method and apparatus for cleaning an exhaust line in a semiconductor processing system
02/10/2004US6689705 Synthetic quartz glass optical material and optical member
02/10/2004US6689702 High dielectric constant metal oxide gate dielectrics
02/10/2004US6689701 Method of forming a spin on glass film of a semiconductor device
02/10/2004US6689700 Chemical fluid deposition method for the formation of metal and metal alloy films on patterned and unpatterned substrates
02/10/2004US6689699 Wherein gas is introduced into a vacuum chamber for treating a substrate to be processed
02/10/2004US6689698 Method for etching a silicided poly using fluorine-based reactive ion etching and sodium hydroxide based solution immersion
02/10/2004US6689697 Method of forming uniformly planarized structure in a semiconductor wafer
02/10/2004US6689696 Forming dielectric layer so as to provide an intrinsic etch rate which increases in the direction of thickness or depth of the dielectric layer; selectively etching to form a hole to contact a conductive area underneath; capacitors
02/10/2004US6689695 Multi-purpose composite mask for dual damascene patterning
02/10/2004US6689693 Methods for utilization of disappearing silicon hard mask for fabrication of semiconductor structures
02/10/2004US6689692 Composition for oxide CMP
02/10/2004US6689691 Method of simultaneously polishing a plurality of objects of a similar type, in particular silicon wafers, on a polishing installation
02/10/2004US6689690 Semiconductor device manufacturing method of forming an etching stopper film on a diffusion prevention film at a higher temperature
02/10/2004US6689689 Selective deposition process for allowing damascene-type Cu interconnect lines
02/10/2004US6689688 Method and device using silicide contacts for semiconductor processing
02/10/2004US6689687 Two-step process for nickel deposition
02/10/2004US6689686 System and method for electroplating fine geometries
02/10/2004US6689685 Process for forming a diffusion barrier material nitride film
02/10/2004US6689684 Cu damascene interconnections using barrier/capping layer
02/10/2004US6689683 Method of manufacturing a semiconductor device
02/10/2004US6689682 Multilayer anti-reflective coating for semiconductor lithography
02/10/2004US6689681 Semiconductor device and a method of manufacturing the same
02/10/2004US6689680 Semiconductor device and method of formation
02/10/2004US6689679 Semiconductor device having bumps
02/10/2004US6689677 CMOS circuit of GaAs/Ge on Si substrate
02/10/2004US6689676 Method for forming a semiconductor device structure in a semiconductor layer
02/10/2004US6689675 Method for making a semiconductor device having a high-k gate dielectric
02/10/2004US6689673 Method for forming a gate with metal silicide
02/10/2004US6689672 Buried layer manufacturing method
02/10/2004US6689671 Low temperature solid-phase epitaxy fabrication process for MOS devices built on strained semiconductor substrate
02/10/2004US6689668 Methods to improve density and uniformity of hemispherical grain silicon layers
02/10/2004US6689666 Replacing a first liner layer with a thicker oxide layer when forming a semiconductor device
02/10/2004US6689665 Method of forming an STI feature while avoiding or reducing divot formation
02/10/2004US6689664 Transistor fabrication method
02/10/2004US6689663 Methods of code programming a mask ROM
02/10/2004US6689662 Method of forming a high voltage power MOSFET having low on-resistance
02/10/2004US6689661 Method for forming minimally spaced MRAM structures
02/10/2004US6689660 4 F2 folded bit line DRAM cell structure having buried bit and word lines
02/10/2004US6689659 Method of making semiconductor memory device having a floating gate with a rounded edge
02/10/2004US6689658 Methods of fabricating a stack-gate flash memory array
02/10/2004US6689657 Method of forming a capacitor
02/10/2004US6689656 Dynamic random access memory and the method for fabricating thereof
02/10/2004US6689655 Method for production process for the local interconnection level using a dielectric conducting pair on pair
02/10/2004US6689654 Methods of manufacturing integrated circuit devices having reduced contact resistance between a substrate and a contact pad while maintaining separation of the substrate and the contact pad
02/10/2004US6689653 Method of preserving the top oxide of an ONO dielectric layer via use of a capping material
02/10/2004US6689652 Method of manufacturing a high electron mobility transistor
02/10/2004US6689651 Laser processing method
02/10/2004US6689650 Fin field effect transistor with self-aligned gate
02/10/2004US6689649 Methods of forming transistors
02/10/2004US6689648 Semiconductor device having silicon on insulator and fabricating method therefor
02/10/2004US6689647 Forming an amorphous silicon thin-film on a glass substrate, crystallizing the amorphous silicon of the thin-film transistor according to a scanning method using a linear light beam
02/10/2004US6689646 Plasma method for fabricating oxide thin films
02/10/2004US6689645 Method of surface treatment on the improvement of electrical properties for doped silicon oxides (SiO2) films
02/10/2004US6689643 Adjustable 3D capacitor
02/10/2004US6689640 Chip scale pin array
02/10/2004US6689639 Method of making semiconductor device
02/10/2004US6689637 Method of manufacturing a multi-chip semiconductor package
02/10/2004US6689635 Apparatus and method for face-to-face connection of a die to a substrate with polymer electrodes
02/10/2004US6689633 Optical detector with a filter layer made of porous silicon and method for the production thereof
02/10/2004US6689630 Method of forming an amorphous aluminum nitride emitter including a rare earth or transition metal element
02/10/2004US6689629 Array substrate for display, method of manufacturing array substrate for display and display device using the array substrate
02/10/2004US6689628 Method for dense pixel fabrication
02/10/2004US6689627 Process for manufacturing micromechanical components in a semiconductor material wafer with reduction in the starting wafer thickness
02/10/2004US6689625 Method for correcting a design data of a layout pattern of a photomask, photomask manufactured by said method, and semiconductor device method using said photomask
02/10/2004US6689624 Method of forming self-aligned, trenchless mangetoresitive random-access memory (MRAM) structure with sidewall containment of MRAM structure
02/10/2004US6689623 Method for forming a capacitor
02/10/2004US6689622 Magnetoresistive memory or sensor devices having improved switching properties and method of fabrication
02/10/2004US6689540 Polymeric backbone having grafted thereon at least one element selected from the group consisting of silicon, germanium, tin and mixtures thereof; and a protecting group.
02/10/2004US6689538 Thermal mass transfer donor element
02/10/2004US6689536 Transmittance of a chemically amplified resist against light of a wavelength shorter than a 180 nm band is improved when polymer includes a polyhydroxystyrene derivative having hexafluoroisopropyl alcohol on its side chain
02/10/2004US6689535 A novalak resin crosslinking agent having hydroxyalkyl and/or alkoxyalkyl groups and an acidic compound; undercoatings; a rectangular cross-sectional profile without causing footing, undercutting, etc. at the bottom
02/10/2004US6689529 Method for measuring diffusion of photogenerated catalyst in chemically amplified resists
02/10/2004US6689521 Preventing plasma induced electrical charge damage
02/10/2004US6689520 Exposure method for correcting dimension variation in electron beam lithography
02/10/2004US6689519 Methods and systems for lithography process control
02/10/2004US6689516 Cutting, flattening silicon oxyfluoride glass tube
02/10/2004US6689492 Incorporating insulating film with blocking effect against heat, moisture and alkaline metals; high performance and reliability electroluminescence display device
02/10/2004US6689419 Method for manufacturing semiconductor device
02/10/2004US6689418 Apparatus for wafer rinse and clean and edge etching
02/10/2004US6689412 Method for making connection balls on electronic circuits or components
02/10/2004US6689283 Dry etching method, microfabrication process and dry etching mask
02/10/2004US6689264 Semiconductor wafer clamp retainer
02/10/2004US6689258 Electrochemically generated reactants for chemical mechanical planarization
02/10/2004US6689257 Substrate processing apparatus and substrate plating apparatus
02/10/2004US6689249 Shield or ring surrounding semiconductor workpiece in plasma chamber
02/10/2004US6689245 Die bonding sheet sticking apparatus and method of sticking die bonding sheet
02/10/2004US6689222 Sealable surface method and device
02/10/2004US6689221 Cooling gas delivery system for a rotatable semiconductor substrate support assembly
02/10/2004US6689220 Plasma enhanced pulsed layer deposition
02/10/2004US6689216 Filling copper into recesses for interconnects formed on a semiconductor and removing a plating liquid remaining on the substrate-contacting portion with suction
02/10/2004US6689215 Method and apparatus for mitigating cross-contamination between liquid dispensing jets in close proximity to a surface
02/10/2004US6689211 Etch stop layer system
02/10/2004US6689186 Silver-containing particles, method and apparatus of manufacture, silver-containing devices made therefrom
02/10/2004US6688969 Method for planarizing a dielectric layer of a flash memory device