Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2004
10/21/2004WO2004077509A3 SHALLOW TRENCH ISOLATION STRUCTURE FOR STRAINED Si ON SiGe
10/21/2004WO2004074932A3 Method and apparatus for cleaning of native oxides with hydroge-containing radicals
10/21/2004WO2004073062A3 Method of manufacturing a reinforced semiconductor wafer
10/21/2004WO2004070794A3 Method to deposit an impermeable film onto a porous low-k dielectric film
10/21/2004WO2004064291A9 Method and apparatus for dual conduction analog programming
10/21/2004WO2004060792A3 Method of forming semiconductor devices through epitaxy
10/21/2004WO2004057671A3 Method for forming patterns aligned on either side of a thin film
10/21/2004WO2004054755A3 Device for gripping a semiconductor plate through a transfer opening, using the closure of the opening
10/21/2004WO2004040647A9 Ferroelectric memory cell
10/21/2004WO2004036624A3 Two-step atomic layer deposition of copper layers
10/21/2004WO2004023532A3 Charge control members
10/21/2004WO2004013371A3 Method and apparatus for plasma implantation without deposition of a layer of byproduct
10/21/2004WO2004012107A3 Integrated circuit devices and methods and apparatuses for designing integrated circuit devices
10/21/2004WO2004010114A3 Device for wafer inspection
10/21/2004WO2003102690B1 Method for producing photoresist masks for structuring semiconductor substrates by means of optical lithography
10/21/2004WO2003098693A3 Schottky barrier cmos device and method
10/21/2004WO2003060864A8 Plasma display panel having trench discharge cell and method of fabricating the same
10/21/2004WO2003005396A8 Method and apparatus for scanned instrument calibration
10/21/2004US20040210863 Method for performing monte-carlo simulations to predict overlay failures in integrated circuit designs
10/21/2004US20040210862 Automated wiring pattern layout method
10/21/2004US20040210859 Electrical line end shortening quantification
10/21/2004US20040210858 Method for modeling semiconductor device and network
10/21/2004US20040210423 Complementary division condition determining method and program and complementary division method
10/21/2004US20040210340 Manufacturing managing method
10/21/2004US20040210071 Organometallic compound, its synthesis method, and solution raw material and metal-containing thin film containing the same
10/21/2004US20040210034 a polyimide from a bis(aminophenyl)methane or sulfone and a diphenyl(methane or sulfone)-3,3'4,4'-tetracarboxylic acid; photolithographic dispersions; spin coatings for semiconductor wafers
10/21/2004US20040210008 Semiconductor device and process for producing the same, and tablet comprising epoxy resin composition
10/21/2004US20040209820 dipeptides/tripeptides; for attenuation of neuropeptide Y mediated responses; sustained release; biodegradable
10/21/2004US20040209618 Optimizing data transfer in radio system
10/21/2004US20040209560 Substrate polishing machine
10/21/2004US20040209559 Chemical mechanical polishing apparatus with rotating belt
10/21/2004US20040209556 Methods for a multilayer retaining ring
10/21/2004US20040209555 Coated metal oxide particles for CMP
10/21/2004US20040209491 Test socket, method of manufacturing the test socket, test method using the test socket, and member to be tested
10/21/2004US20040209487 Pecvd silicon oxide thin film deposition
10/21/2004US20040209486 STI formation for vertical and planar transistors
10/21/2004US20040209484 Method of depositing a silicon dioxide comprising layer doped with at least one of P, B and Ge
10/21/2004US20040209483 Method for thermally treating a substrate that comprises several layers
10/21/2004US20040209482 Oxynitride film forming system
10/21/2004US20040209481 Surface treating for micromachining and surface treatment method
10/21/2004US20040209480 Method to reduce photoresist mask line dimensions
10/21/2004US20040209479 Semiconductor device having trench isolation layer and a method of forming the same
10/21/2004US20040209477 Methods for substrate orientation
10/21/2004US20040209476 Method of fabricating a magneto-resistive random access memory (MRAM) device
10/21/2004US20040209475 Planarization process for semiconductor substrates
10/21/2004US20040209474 Semiconductor structures and manufacturing methods
10/21/2004US20040209473 Methods and etchants for selectively removing dielectric materials
10/21/2004US20040209472 Method for manufacturing non-volatile memory cells on a semiconductive substrate
10/21/2004US20040209471 Method for fabricating liquid crystal display panel array
10/21/2004US20040209469 Etching method
10/21/2004US20040209468 Method for fabricating a gate structure of a field effect transistor
10/21/2004US20040209467 Method for reducing plasma related damages
10/21/2004US20040209466 Effective MIM fabrication method and apparatus to avoid breakdown and leakage on damascene copper process
10/21/2004US20040209465 Method and apparatus for depositing refractory metal layers employing sequential deposition techniques to form a nucleation layer
10/21/2004US20040209464 Plating method and plating apparatus
10/21/2004US20040209463 Methods of fabricating field effect transistors having multiple stacked channels
10/21/2004US20040209462 Method of manufacturing semiconductor device
10/21/2004US20040209461 Metal line stacking structure in semiconductor device and formation method thereof
10/21/2004US20040209460 Reliability barrier integration for Cu application
10/21/2004US20040209459 Semiconductor device and method of manufacturing the same
10/21/2004US20040209458 Semiconductor device having rounding profile structure for reducing step profile and manufacturing processing stress and its manufacturing method
10/21/2004US20040209457 Method for forming capacitor
10/21/2004US20040209456 Surface barriers for copper and silver interconnects produced by a damascene process
10/21/2004US20040209455 Insulating film of semiconductor device and coating solution for forming insulating film and method of manufacturing insulating film
10/21/2004US20040209454 Method of fabricating local interconnection using selective epitaxial growth
10/21/2004US20040209453 Integrated electronic device having flip-chip connection with circuit board and fabrication method thereof
10/21/2004US20040209452 Solder terminal and fabricating method thereof
10/21/2004US20040209451 Solder deposition method and solder bump forming method
10/21/2004US20040209450 Method of manufacturing a semiconductor device for reducing resistance of a CoSi2 layer
10/21/2004US20040209449 Method of characterizing implantation of species in a substrate
10/21/2004US20040209447 Method of producing crystalline semiconductor material and method of fabricating semiconductor device
10/21/2004US20040209446 Methods of forming semiconductive materials having flattened surfaces; methods of forming isolation regions; and methods of forming elevated source/drain regions
10/21/2004US20040209445 Method for treating semiconductor processing components and components formed thereby
10/21/2004US20040209444 Semiconductor wafer front side protection
10/21/2004US20040209443 Corrosion inhibitor additives to prevent semiconductor device bond-pad corrosion during wafer dicing operations
10/21/2004US20040209442 Device manufacturing method and device, electro-optic device, and electronic equipment
10/21/2004US20040209441 Method for preparing a bonding surface of a semiconductor layer of a wafer
10/21/2004US20040209440 Method for preparing a device structure having a wafer structure deposited on a composite substrate having a matched coefficient of thermal expansion
10/21/2004US20040209438 Semiconductor device and method of manufacturing the same
10/21/2004US20040209437 Method of forming a shallow trench isolation region in strained silicon layer and in an underlying on silicon - germanium layer
10/21/2004US20040209436 Trench capacitor and process for preventing parasitic leakage
10/21/2004US20040209435 Method of Making a Nanogap for Variable Capacitive Elements, and Device having a Nanogap
10/21/2004US20040209434 Semiconductor layer
10/21/2004US20040209433 Method for manufacturing and structure of semiconductor device with shallow trench collector contact region
10/21/2004US20040209432 Nickel salicide process with reduced dopant deactivation
10/21/2004US20040209431 Semiconductor memory device and method of manufacturing the same
10/21/2004US20040209430 Method for forming a multi-layered structure of a semiconductor device and methods for forming a capacitor and a gate insulation layer using the multi-layered structure
10/21/2004US20040209429 Method of forming bit line contact
10/21/2004US20040209428 Split gate flash memory device and method of fabricating the same
10/21/2004US20040209427 Method of filling bit line contact via
10/21/2004US20040209426 Method and composite for decreasing charge leakage
10/21/2004US20040209425 Method of manufacturing a vertical MOS transistor
10/21/2004US20040209424 Method of fabricating semiconductor memory device
10/21/2004US20040209423 Methods for reducing capacitor dielectric absorption and voltage coefficient
10/21/2004US20040209422 Semiconductor device having trench top isolation layer and method for forming the same
10/21/2004US20040209421 Semiconductor processing methods of forming integrated circuitry
10/21/2004US20040209420 Method for making a ferroelectric memory cell in a ferroelectric memory device, and a ferroelectric memory device
10/21/2004US20040209419 Semiconductor apparatus with a stable contact resistance and a method of making the semiconductor apparatus
10/21/2004US20040209418 Method for producing high-speed vertical npn biopolar transistors and complementary mos transistors on a chip
10/21/2004US20040209417 Method and system for drying semiconductor wafers in a spin coating process
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