H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2004
11/18/2004	WO2004099466A2 Method for electroless deposition of phosphorus-containing metal films onto copper with palladium-free activation
11/18/2004	WO2004099461A2 Method of forming compressive alpha-tantalum on substrates and devices including same
11/18/2004	WO2004099296A1 Nanoporous materials suitable for use in semiconductors
11/18/2004	WO2004099086A1 Filter cartridge for fluid for treating surface of electronic device substrate
11/18/2004	WO2004099065A1 Vacuum package fabrication of integrated circuit components
11/18/2004	WO2004098830A1 Dispersion for chemical-mechanical polishing
11/18/2004	WO2004098802A1 Automatic semiconductor contacts cleaner
11/18/2004	WO2004098794A1 Insulating method and insulated metal product
11/18/2004	WO2004090201A3 Method for the production of monocrystalline crystals
11/18/2004	WO2004086826A3 Esd dissipative structural components
11/18/2004	WO2004082013A8 Alignment system for integrated circuit fabrication
11/18/2004	WO2004077574A3 Semiconductor memory cell and method for producing said cell
11/18/2004	WO2004077541A3 A method of etching ferroelectric devices
11/18/2004	WO2004073045A3 Epitaxial growth of a zirconium diboride layer on silicon substrates
11/18/2004	WO2004073018A3 Sacrificial benzocyclobutene/norbornene polymers for making air gaps within semiconductor devices
11/18/2004	WO2004061897A3 Very low moisture o-ring and method for preparing the same
11/18/2004	WO2004055891A9 Semiconductor device and stacked semiconductor device
11/18/2004	WO2004049073A3 Drying process for low-k dielectric films
11/18/2004	WO2004025707A3 ACTIVE ELECTRONIC DEVICES BASED ON GALLIUM NITRIDE AND ITS ALLOYS GROWN ON SILICON SUBSTRATES WITH BUFFER LAYERS OF SiCAIN
11/18/2004	WO2003052514A3 Patterning of solid state features by direct write nanolithographic printing
11/18/2004	WO2003030219A3 High pressure processing chamber for multiple semiconductor substrates
11/18/2004	WO2003029113A3 System for cushioning wafer in wafer carrier
11/18/2004	US20040230939 Calculating method, verification method, verification program and verification system for edge deviation quantity, and semiconductor device manufacturing method
11/18/2004	US20040230933 Tool flow process for physical design of integrated circuits
11/18/2004	US20040230928 Apparatus connectable to a computer network for circuit design verification, computer implemented method for circuit design verification, and computer progam product for controlling a computer system so as to verify circuit designs
11/18/2004	US20040230769 Method and device for producing layout patters of a semiconductor device having an even wafer surface
11/18/2004	US20040230396 Method and apparatus for monitoring integrated circuit fabrication
11/18/2004	US20040230341 Method and apparatus for determining a substrate exchange position in a processing system
11/18/2004	US20040230334 Scheduling multi-robot processing systems
11/18/2004	US20040230000 Epoxy resins, phenolic resins, a synthetic rubber (acrylonitrile-butadiene), and microcapsules having a thermoplastic resin shell; improved bonding strength and storage stability; microelectronics; pressure sensitive adhesives
11/18/2004	US20040229761 Composition for removal of sidewall polymer and etchant residues without a separate solvent rinse step
11/18/2004	US20040229552 Anionic abrasive particles treated with positively charged polyelectrolytes for CMP
11/18/2004	US20040229548 Process for polishing a semiconductor wafer
11/18/2004	US20040229545 Endpoint detection system for wafer polishing
11/18/2004	US20040229477 Apparatus and method for producing a <111> orientation aluminum film for an integrated circuit device
11/18/2004	US20040229476 Method of manufacturing semiconductor device
11/18/2004	US20040229475 System and method for mitigating oxide growth in a gate dielectric
11/18/2004	US20040229474 [method for treating wafer surface]
11/18/2004	US20040229473 Self-aligned contacts to gates
11/18/2004	US20040229472 Exposure mask pattern formation method, exposure mask, and semiconductor device production method employing the exposure mask
11/18/2004	US20040229471 Periodic patterns and technique to control misalignment between two layers
11/18/2004	US20040229470 Method for etching an aluminum layer using an amorphous carbon mask
11/18/2004	US20040229469 Photodiode passivation technique
11/18/2004	US20040229468 Polishing method
11/18/2004	US20040229467 Method of fabricating semiconductor device
11/18/2004	US20040229466 Semiconductor device and manufacturing method thereof
11/18/2004	US20040229463 Semiconductor device and manufacturing method thereof
11/18/2004	US20040229462 Method to reduce the copper line roughness for increased electrical conductivity of narrow interconnects (<100nm)
11/18/2004	US20040229461 Chemical mechanical polishing compositions for copper and associated materials and method of using same
11/18/2004	US20040229460 Surface treatment of metal interconnect lines
11/18/2004	US20040229459 Integration of annealing capability into metal deposition or CMP tool
11/18/2004	US20040229458 Method and structure of a thick metal layer using multiple deposition chambers
11/18/2004	US20040229457 Method to fill a trench and tunnel by using ALD seed layer and electroless plating
11/18/2004	US20040229456 Electroplated interconnection structures on integrated circuit chips
11/18/2004	US20040229455 Advanced VLSI metallization
11/18/2004	US20040229454 Process for fabricating an integrated electronic circuit that incorporates air gaps
11/18/2004	US20040229453 Methods of pore sealing and metal encapsulation in porous low k interconnect
11/18/2004	US20040229452 Densifying a relatively porous material
11/18/2004	US20040229451 Method and structure for tungsten gate metal surface treatment while preventing oxidation
11/18/2004	US20040229450 Fabrication of dielectric on a gate surface to insulate the gate from another element of an integrated circuit
11/18/2004	US20040229449 Method of depositing metal film and metal deposition cluster tool including supercritical drying/cleaning module
11/18/2004	US20040229448 Method for transforming an amorphous silicon layer into a polysilicon layer
11/18/2004	US20040229447 Process for producing luminescent silicon nanoparticles
11/18/2004	US20040229446 Method of production of semiconductor device
11/18/2004	US20040229445 Manufacturing method of semiconductor device
11/18/2004	US20040229444 Glass-based SOI structures
11/18/2004	US20040229443 Structures, materials and methods for fabrication of nanostructures by transposed split of ion cut materials
11/18/2004	US20040229442 Method for forming high resistive region in semiconductor device
11/18/2004	US20040229441 Substrate processing apparatus
11/18/2004	US20040229439 Method of fabricating a zener diode chip for use as a shunt in Christmas tree lighting
11/18/2004	US20040229438 Process for forming CMOS transistors and MOS transistors of the drain extension type, with a low gate region resistance, in the same semiconductor substrate
11/18/2004	US20040229437 Non-volatile memory device having a nitride barrier to reduce the fast erase effect
11/18/2004	US20040229436 Method for manufacturing non-volatile memory cell
11/18/2004	US20040229435 [method of manufacturing flash memory]
11/18/2004	US20040229434 Method for forming single-level electrically erasable and programmable read only memory operated in environment with high/low-voltage
11/18/2004	US20040229433 Nucleation for improved flash erase characteristics
11/18/2004	US20040229432 Floating gate memory device and method of manufacturing the same
11/18/2004	US20040229431 Fabrication of gate dielectric in nonvolatile memories having select, floating and control gates
11/18/2004	US20040229430 Fabrication process for a magnetic tunnel junction device
11/18/2004	US20040229429 Semiconductor device and method of fabricating the same
11/18/2004	US20040229428 Semiconductor memory device including storage nodes and resistors and method of manufacturing the same
11/18/2004	US20040229427 Semiconductor device with capacitor
11/18/2004	US20040229426 [shallow trench isolation structure and dynamic random access memory, and fabricating methods thereof]
11/18/2004	US20040229425 Semiconductor device and bump formation method
11/18/2004	US20040229424 Semiconductor device and corresponding fabrication method
11/18/2004	US20040229423 Electrode structure for use in an integrated circuit
11/18/2004	US20040229422 Semiconductor device having two-layered charge storage electrode
11/18/2004	US20040229421 Semiconductor device with novel FLM composition
11/18/2004	US20040229420 Method for manufacturing semiconductor device having trench gate
11/18/2004	US20040229419 Gas processing device and method of fabricating a semiconductor device
11/18/2004	US20040229418 Electronic device and method of manufacturing the same, chip carrier, circuit board, and electronic instrument
11/18/2004	US20040229417 Method of forming film
11/18/2004	US20040229416 [method of forming ldd of semiconductor devices]
11/18/2004	US20040229415 Thin film transistor and method for fabricating the same
11/18/2004	US20040229414 FET having epitaxial silicon growth
11/18/2004	US20040229413 Thin-film transistor and method of making same
11/18/2004	US20040229412 Inverter made of complementary p and n channel transistors using a single directly-deposited microcrystalline silicon film
11/18/2004	US20040229411 Top gate thin-film transistor and method of producing the same
11/18/2004	US20040229410 Pattern forming method, method of manufacturing thin film transistor substrate, method of manufacturing liquid crystal display and exposure mask
11/18/2004	US20040229409 Method for fabricating nanometer gate in semiconductor device using thermally reflowed resist technology

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