Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2004
11/23/2004US6821901 Method of through-etching substrate
11/23/2004US6821900 Method for dry etching deep trenches in a substrate
11/23/2004US6821899 System, method and apparatus for improved local dual-damascene planarization
11/23/2004US6821897 Method for copper CMP using polymeric complexing agents
11/23/2004US6821896 Method to eliminate via poison effect
11/23/2004US6821895 Dynamically adjustable slurry feed arm for wafer edge profile improvement in CMP
11/23/2004US6821894 Chemical mechanical polishing uses an auxiliary layer between a dielectric in the vicinity of patterned portions and a layer of a liner
11/23/2004US6821893 Method of manufacturing a substrate for information recording media
11/23/2004US6821892 Intelligent wet etching tool as a function of chemical concentration, temperature and film loss
11/23/2004US6821891 Atomic layer deposition of copper using a reducing gas and non-fluorinated copper precursors
11/23/2004US6821890 Method for improving adhesion to copper
11/23/2004US6821889 Atomic layer deposition using a boron compound as a reducing agent.
11/23/2004US6821888 Method of copper/copper surface bonding using a conducting polymer for application in IC chip bonding
11/23/2004US6821887 Method of forming a metal silicide gate in a standard MOS process sequence
11/23/2004US6821886 IMP TiN barrier metal process
11/23/2004US6821885 Semiconductor device and method for manufacturing the same
11/23/2004US6821884 Method of fabricating a semiconductor device
11/23/2004US6821883 Shallow trench isolation using antireflection layer
11/23/2004US6821882 Semiconductor device manufacturing method for improving adhesivity of copper metal layer to barrier layer
11/23/2004US6821881 Method for chemical mechanical polishing of semiconductor substrates
11/23/2004US6821880 Process of dual or single damascene utilizing separate etching and DCM apparati
11/23/2004US6821879 Copper interconnect by immersion/electroless plating in dual damascene process
11/23/2004US6821878 Area-array device assembly with pre-applied underfill layers on printed wiring board
11/23/2004US6821877 Method of fabricating metal interconnection of semiconductor device
11/23/2004US6821876 Fabrication method of strengthening flip-chip solder bumps
11/23/2004US6821875 Low area metal contacts for photovoltaic devices
11/23/2004US6821874 Method for depositing tungsten silicide film and method for preparing gate electrode/wiring
11/23/2004US6821873 Anneal sequence for high-κ film property optimization
11/23/2004US6821872 Method of making a bit line contact device
11/23/2004US6821871 Method for manufacturing semiconductor device, substrate treatment method, and semiconductor manufacturing apparatus
11/23/2004US6821870 Heterojunction bipolar transistor and method for fabricating the same
11/23/2004US6821868 Method of forming nitrogen enriched gate dielectric with low effective oxide thickness
11/23/2004US6821867 Method for forming grooves in the scribe region to prevent a warp of a semiconductor substrate
11/23/2004US6821866 Method of identifying wafer cutting positions of different size partial wafers
11/23/2004US6821865 Deep isolation trenches
11/23/2004US6821864 Method to achieve increased trench depth, independent of CD as defined by lithography
11/23/2004US6821863 Method for producing a cavity in a monocrystalline silicon substrate and a semiconductor component having a cavity in a monocrystalline silicon substrate with an epitaxial covering layer
11/23/2004US6821862 Methods of manufacturing integrated circuit devices that include a metal oxide layer disposed on another layer to protect the other layer from diffusion of impurities and integrated circuit devices manufactured using same
11/23/2004US6821861 Method for fabricating an electrode arrangement for charge storage
11/23/2004US6821859 Method and system for controlling an electrical property of a field effect transistor
11/23/2004US6821858 Semiconductor devices and methods for manufacturing the same
11/23/2004US6821857 High on-current device for high performance embedded DRAM (eDRAM) and method of forming the same
11/23/2004US6821856 Method of manufacturing semiconductor device having source/drain regions included in a semiconductor layer formed over an isolation insulating film and a semiconductor device fabricated thereby
11/23/2004US6821855 Reverse metal process for creating a metal silicide transistor gate structure
11/23/2004US6821854 Method of manufacturing a semiconductor integrated circuit device
11/23/2004US6821853 Differential implant oxide process
11/23/2004US6821852 Dual doped gates
11/23/2004US6821851 Method of making ultra thin body vertical replacement gate MOSFET
11/23/2004US6821850 Method of manufacturing a multi-level flash EEPROM cell
11/23/2004US6821849 Split gate flash memory cell and manufacturing method thereof
11/23/2004US6821847 Nonvolatile memory structures and fabrication methods
11/23/2004US6821846 Method of forming contact
11/23/2004US6821845 Semiconductor device and method for manufacturing the same
11/23/2004US6821844 Collar dielectric process for reducing a top width of a deep trench
11/23/2004US6821843 Fabrication method for an array area and a support area of a dynamic random access memory
11/23/2004US6821842 [DRAM structure and fabricating method thereof]
11/23/2004US6821841 Method for fabricating a mask read-only-memory with diode cells
11/23/2004US6821839 Method for fabricating MIM capacitor
11/23/2004US6821838 Method of forming an ultra thin dielectric film and a semiconductor device incorporating the same
11/23/2004US6821837 Stack-film trench capacitor and method for manufacturing the same
11/23/2004US6821836 Disposable spacer
11/23/2004US6821835 Chemical vapor deposition of silicate high dielectric constant materials
11/23/2004US6821834 Ion implantation methods and transistor cell layout for fin type transistors
11/23/2004US6821833 Method for separately optimizing thin gate dielectric of PMOS and NMOS transistors within the same semiconductor chip and device manufactured thereby
11/23/2004US6821832 Method of fabricating an X-ray detector array element
11/23/2004US6821831 Electrostatic discharge protection in double diffused MOS transistors
11/23/2004US6821830 Method for fabricating a semiconductor device including using a hard mask or a silylated photoresist for an angled tilted ion implant
11/23/2004US6821829 Method of manufacturing a semiconductor component and semiconductor component thereof
11/23/2004US6821828 Method of manufacturing a semiconductor device
11/23/2004US6821827 Method of manufacturing a semiconductor device
11/23/2004US6821826 Three dimensional CMOS integrated circuits having device layers built on different crystal oriented wafers
11/23/2004US6821825 Process for deposition of semiconductor films
11/23/2004US6821824 Semiconductor device and method of manufacturing the same
11/23/2004US6821822 Method of manufacturing semiconductor device, molding device for semiconductor device, and semiconductor device
11/23/2004US6821821 Methods for manufacturing resistors using a sacrificial layer
11/23/2004US6821820 Lead frame manufacturing method
11/23/2004US6821818 Method of assembling a semiconductor device including sweeping (with a squeegee) encapsulant over the device repeatedly
11/23/2004US6821816 Relaxed tolerance flip chip assembly
11/23/2004US6821815 Method of assembling a semiconductor chip package
11/23/2004US6821814 Method for joining a semiconductor chip to a chip carrier substrate and resulting chip package
11/23/2004US6821813 Process for bonding solder bumps to a substrate
11/23/2004US6821812 Structure and method for mounting a small sample in an opening in a larger substrate
11/23/2004US6821811 Organic thin film transistor and method of manufacturing the same, and semiconductor device having the organic thin film transistor
11/23/2004US6821810 High transmittance overcoat for optimization of long focal length microlens arrays in semiconductor color imagers
11/23/2004US6821809 Solid state image pickup device and method of producing solid state image pickup device
11/23/2004US6821808 CMOS APS with stacked avalanche multiplication layer which provides linear and logarithmic photo-conversion characteristics
11/23/2004US6821807 Method of forming nitride-based semiconductor layer, and method of manufacturing nitride-based semiconductor device
11/23/2004US6821806 Method for forming compound semiconductor layer and compound semiconductor apparatus
11/23/2004US6821805 Semiconductor device, semiconductor substrate, and manufacture method
11/23/2004US6821803 Method of manufacturing an electroluminescence display device
11/23/2004US6821801 Manufacturing method of semiconductor laser diode
11/23/2004US6821799 Method of fabricating a multi-color light emissive display
11/23/2004US6821797 Semiconductor device and its manufacturing method
11/23/2004US6821795 Infrared thermopile detector system for semiconductor process monitoring and control
11/23/2004US6821794 Flexible snapshot in endpoint detection
11/23/2004US6821792 Method and apparatus for determining a sampling plan based on process and equipment state information
11/23/2004US6821791 Method for reworking metal layers on integrated circuit bond pads
11/23/2004US6821729 Electronic apparatus for monitoring electrical impulse from biological samples
11/23/2004US6821713 Regulate and repeatably trim a nitride or polysilicon spacer
11/23/2004US6821712 Forming a semiconductive antireflection film on the rear of the substrate having a specified band gap energy and reflectance that satisfies an equation relating refractive indexes of the substrate and the film