H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2004
12/01/2004	CN1178279C Method for manufacturing semiconductor device
12/01/2004	CN1178278C Double buffer layer process for radio-frequency plasma molecular beam epitaxial growth of gallium nitride
12/01/2004	CN1178277C Low temperature formation of backside ohmic contacts of vertical devices
12/01/2004	CN1178276C Method for preventing low dielectric constant dielectric layer from deteriorating in thecourse of removing photoresistance
12/01/2004	CN1178275C Three-D stereo mask
12/01/2004	CN1178274C Semiconductor mfg. apparatus its control system guiding method and interlocking method
12/01/2004	CN1178273C Handling system and method of changing attributes of manufacturing processes for semi-conductor equipment
12/01/2004	CN1178272C Semiconductor device, microdrive, microwave and microrelay using the same and manufacture thereof
12/01/2004	CN1178271C A method and apparatus for transport and tracking of electronic component
12/01/2004	CN1178270C Semiconductor device and its manufacturing method
12/01/2004	CN1178197C Active dot matrix device and indicator
12/01/2004	CN1178195C Liquid crystal display device
12/01/2004	CN1178094C Method of making silicon crystal liquid crystal display back plate
11/2004
11/30/2004	US6826743 Method for automatically correcting overlay alignment of a semiconductor wafer
11/30/2004	US6826742 Semiconductor device, designing method thereof, and recording medium storing semiconductor designing program
11/30/2004	US6826738 Optimization of die placement on wafers
11/30/2004	US6826735 Inspection data analysis program, defect inspection apparatus, defect inspection system and method for semiconductor device
11/30/2004	US6826734 Architecture for programmable on-chip termination
11/30/2004	US6826731 Method of designing semiconductor integrated circuit device
11/30/2004	US6826517 Method and apparatus for simulating manufacturing, electrical and physical characteristics of a semiconductor device
11/30/2004	US6826442 Processing system including exposure apparatus, reticle stocker having sealing member with first and second gates, controller for controlling atmosphere in interior of sealing member, path for transferring reticle to and from stocker
11/30/2004	US6826441 Method and system for management to manufacturing process for products
11/30/2004	US6826437 Association of process context with configuration document for manufacturing process
11/30/2004	US6826298 Automated wafer defect inspection system and a process of performing such inspection
11/30/2004	US6826218 Semiconductor laser device capable of suppressing leakage current in a light emitting end surface and method for manufacturing same
11/30/2004	US6826109 Semiconductor integrated circuit device with a RAM macro having two operation modes for receiving an input signal at different timings
11/30/2004	US6826084 Accessing individual storage nodes in a bi-directional nonvolatile memory cell
11/30/2004	US6826081 Nonvolatile semiconductor memory device, nonvolatile semiconductor memory device-integrated system, and defective block detecting method
11/30/2004	US6826079 Method and system for performing equipotential sensing across a memory array to eliminate leakage currents
11/30/2004	US6826078 Magnetoresistive effect element and magnetic memory having the same
11/30/2004	US6826077 Magnetic random access memory with reduced parasitic currents
11/30/2004	US6826076 Non-volatile memory device
11/30/2004	US6826075 Random access semiconductor memory with reduced signal overcoupling
11/30/2004	US6826074 Semiconductor memory device
11/30/2004	US6826070 Read only memory(ROM) cell, program method of ROM cell, layout method of ROM cell, and ROM device comprising ROM cell
11/30/2004	US6826069 Interleaved wordline architecture
11/30/2004	US6826030 Method of offset voltage control for bipolar ionization systems
11/30/2004	US6826025 Method and apparatus for providing ESD protection and/or noise reduction in an integrated circuit
11/30/2004	US6825998 Retainer
11/30/2004	US6825938 Film thickness measuring method and step measuring method
11/30/2004	US6825924 Dual peak wavelength tube, illuminator for inspection, inspecting apparatus, and method thereof
11/30/2004	US6825920 Method and system of determining chamber seasoning condition by optical emission
11/30/2004	US6825915 Alignment device
11/30/2004	US6825914 System for flushing at least one internal space of an objective
11/30/2004	US6825912 System for adjusting a photo-exposure time
11/30/2004	US6825900 Display apparatus
11/30/2004	US6825809 High-frequency semiconductor device
11/30/2004	US6825773 Radio frequency data communications device
11/30/2004	US6825701 Power-on reset circuit/method for initializing an integrated circuit
11/30/2004	US6825700 Semiconductor device
11/30/2004	US6825684 Hot carrier oxide qualification method
11/30/2004	US6825682 Test configuration for the functional testing of a semiconductor chip
11/30/2004	US6825681 Thermal control of a DUT using a thermal control substrate
11/30/2004	US6825678 Wafer level interposer
11/30/2004	US6825635 Vibration isolator, device manufacturing apparatus and method, semiconductor manufacturing plant and method of maintaining device manufacturing apparatus
11/30/2004	US6825618 Distributed inductively-coupled plasma source and circuit for coupling induction coils to RF power supply
11/30/2004	US6825617 Semiconductor processing apparatus
11/30/2004	US6825615 Lamp having a high-reflectance film for improving directivity of light and heat treatment apparatus having such a lamp
11/30/2004	US6825597 Ion source, ion implanting device, and manufacturing method of semiconductor devices
11/30/2004	US6825572 Integrated circuit die connected and elevated; wire bonds connect pad on die to pads on substrates; support paste flows outward during connecting; encapsulation; semiconductors
11/30/2004	US6825571 Semiconductor device and its manufacturing method, a circuit board and an electronic device
11/30/2004	US6825570 Resistance-reducing conductive adhesives for attachment of electronic components
11/30/2004	US6825567 Side surface of second chip is progressive distance from chip accommodation space for lessening capillary flow of underfilling material between concave wall and side surface
11/30/2004	US6825566 Semiconductor device with reduced interconnection capacity
11/30/2004	US6825564 Nickel layer contains phosphorus; wire-bonded; oxidation resistance; integrated and printed circuits; free of gold cap
11/30/2004	US6825562 Damascene structure fabricated using a layer of silicon-based photoresist material
11/30/2004	US6825561 Metallization line formed within a low-k dielectric material; hard mask layer; embedded dielectric cap; semiconductors
11/30/2004	US6825559 Group III nitride based flip-chip intergrated circuit and method for fabricating
11/30/2004	US6825555 Hot plate
11/30/2004	US6825553 Multichip wafer level packages and computing systems incorporating same
11/30/2004	US6825550 Board-on-chip packages with conductive foil on the chip surface
11/30/2004	US6825548 Semiconductor device
11/30/2004	US6825547 Semiconductor device including edge bond pads
11/30/2004	US6825545 On chip decap trench capacitor (DTC) for ultra high performance silicon on insulator (SOI) systems microprocessors
11/30/2004	US6825544 Method for shallow trench isolation and shallow trench isolation structure
11/30/2004	US6825543 Semiconductor device, method for manufacturing the same, and liquid jet apparatus
11/30/2004	US6825539 Integrated circuit-integrated flexible shear-stress sensor skin and method of fabricating the same
11/30/2004	US6825538 Semiconductor device using an insulating layer having a seed layer
11/30/2004	US6825534 Semiconductor device on a combination bulk silicon and silicon-on-insulator (SOI) substrate
11/30/2004	US6825533 Inverted staggered thin film transistor with etch stop layer and method of making same
11/30/2004	US6825532 Bonded substrate for an integrated circuit containing a planar intrinsic gettering zone
11/30/2004	US6825531 Lateral DMOS transistor with a self-aligned drain region
11/30/2004	US6825530 Zero Threshold Voltage pFET and method of making same
11/30/2004	US6825529 Stress inducing spacers
11/30/2004	US6825528 Semiconductor device, method of manufacture thereof, and information processing device
11/30/2004	US6825526 Structure for increasing drive current in a memory array and related method
11/30/2004	US6825525 Semiconductor memory device
11/30/2004	US6825524 Semiconductor integrated circuit device
11/30/2004	US6825523 Process for manufacturing a dual charge storage location memory cell
11/30/2004	US6825522 Capacitor electrode having an interface layer of different chemical composition formed on a bulk layer
11/30/2004	US6825521 Semiconductor device with capacitor
11/30/2004	US6825520 Capacitor with a roughened silicide layer
11/30/2004	US6825519 Selectively deposited PGO thin film and method for forming same
11/30/2004	US6825518 Capacitor in semiconductor device and method for fabricating the same
11/30/2004	US6825517 Ferroelectric transistor with enhanced data retention
11/30/2004	US6825515 Ferroelectric capacitor with electrode formed in separate oxidizing conditions
11/30/2004	US6825513 High power mosfet semiconductor device
11/30/2004	US6825512 Preparing active part comprising wafer provided with conductive connection pads on one face and the base being provided with conductive pins, electrolytic deposition of conductive metal on the pin; oxidation, nitrizing
11/30/2004	US6825511 Semiconductor device having fuse circuit on cell region and method of fabricating the same
11/30/2004	US6825508 Heterojunction bipolar transistor and production process therefor

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