Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2005
03/31/2005US20050070036 Method of forming mirrors by surface transformation of empty spaces in solid state materials
03/31/2005US20050070035 Display panel and method for manufacturing the same
03/31/2005US20050070034 Real-time gate etch critical dimension control by oxygen monitoring
03/31/2005US20050070033 Magnetic memory device and method of manufacturing the same
03/31/2005US20050070032 Ferroelectric polymer memory with a thick interface layer
03/31/2005US20050070031 Manufacturing method of semiconductor device
03/31/2005US20050070030 Device and method for forming a contact to a top electrode in ferroelectric capacitor devices
03/31/2005US20050069819 Method for forming resist pattern and method for manufacturing semiconductor device
03/31/2005US20050069815 Forming a water soluble protective film on substrate irradiation with light followed by removal with water
03/31/2005US20050069814 Pattern formation method
03/31/2005US20050069813 Photoresists film with aperture patterns and swelling with liquid in apertures for reverse tapering of apertures for semiconductors
03/31/2005US20050069808 An acid generator, a solubilizing PFA copolymer; high precision patterns by using a vacuum ultraviolet ray with a wavelength less than 160 nm; microlithography
03/31/2005US20050069807 Photoresist composition
03/31/2005US20050069791 Patterns with pivots measured in energy and semiconductor construction
03/31/2005US20050069788 Photomask, photomask manufacturing method and semiconductor device manufacturing method using photomask
03/31/2005US20050069787 Mask blanks and method of producing the same
03/31/2005US20050069786 Stencil mask, production method thereof, exposure apparatus, exposure method and electronic device production method
03/31/2005US20050069785 determining degradation by printing on a wafer with a stepper a mask image of monitor structures located in a transition between clear and opaque regions, one stepping distance apart; measuring the displacement between structures; determining pellicle degradation by dispalcement from each other
03/31/2005US20050069783 masking; selectively coding the spaced regions to define a masked read only memory (ROM) structure that causes optical interference; illumination; development; improved circuit density and reliability; miniaturization; integrated circuits
03/31/2005US20050069651 Plasma processing system
03/31/2005US20050069646 Forming a protective film which selectively covers the surfaces of embedded interconnects by pretreatment of interconnects with a surface activating agent and excessive etch inhibitor followed by electroless plating; enhanced reliability of the interconnects and increased throughput
03/31/2005US20050069643 MOCVD selective deposition of C-axis oriented PB5GE3O11 thin films on In2O3 oxides
03/31/2005US20050069641 Method for depositing metal layers using sequential flow deposition
03/31/2005US20050069640 Small particle size, narrow size distribution and a spherical morphology; spray pyrolysis
03/31/2005US20050069632 Exposing the substrate to a reducing gas while exposing it to pulses of a metal-carbonyl precursor gas until a metal layer with desired thickness is formed
03/31/2005US20050069631 Photoresist supply apparatus and method of controlling the operation thereof
03/31/2005US20050069433 Technique of suppressing influence of contamination of exposure atmosphere
03/31/2005US20050069420 Purging system and purging method for the interior of a portable type hermetically sealed container
03/31/2005US20050069402 Substrate accommodating tray pallet and substrate transfer system
03/31/2005US20050069399 Apparatus and method for dry-loading of substrates in scrubber cleaner
03/31/2005US20050069142 Integrated circuit and electronic apparatus provided with the same with software IP implementation
03/31/2005US20050069128 Data-generating device and data-writing device for FPGA
03/31/2005US20050069015 Resistance furnace
03/31/2005US20050069014 Electric heater for thermal treatment furnace
03/31/2005US20050069000 Dividing method and apparatus for sheet-shaped workpiece
03/31/2005US20050068998 Wavelength conversion apparatus
03/31/2005US20050068997 Laser spectral engineering for lithographic process
03/31/2005US20050068838 Semiconductor memory device allowing accurate burn-in test
03/31/2005US20050068834 Magnetic random access memory (MRAM) having a magnetic tunneling junction (MTJ) layer including a tunneling film of uniform thickness and method of manufacturing the same
03/31/2005US20050068830 Magnetic memory device
03/31/2005US20050068828 Merged MOS-bipolar capacitor memory cell
03/31/2005US20050068825 Magnetic memory device and method of manufacturing magnetic memory device
03/31/2005US20050068823 Nonvolatile semiconductor memory and method for controlling the same
03/31/2005US20050068822 Memory device and its manufacturing method
03/31/2005US20050068807 Semiconductor integrated circuit device
03/31/2005US20050068736 Method and apparatus for efficient temperature control using a contact volume
03/31/2005US20050068726 Electro-fluidic device and interconnect and related methods
03/31/2005US20050068725 Thermal management systems for micro-components
03/31/2005US20050068714 Semiconductor device
03/31/2005US20050068713 Capacitor, method of manufacture thereof and semiconductor device
03/31/2005US20050068707 Semiconductor device provided with overheat protection circuit and electronic circuit using the same
03/31/2005US20050068705 Overvoltage protection circuit of output MOS transistor
03/31/2005US20050068695 Magnetoresistive multilayer film
03/31/2005US20050068672 Liftoff process for thin photoresist
03/31/2005US20050068608 Selective isotropic etch for titanium-based materials
03/31/2005US20050068515 Method for detecting positioning errors of circuit patterns during the transfer by means of a mask into layers of a substrate of a semiconductor wafer
03/31/2005US20050068514 Methods and systems to compensate for a stitching disturbance of a printed pattern in a maskless lithography system utilizing overlap of exposure zones with attenuation of the aerial image in the overlap region
03/31/2005US20050068511 Lithographic apparatus and device manufacturing method
03/31/2005US20050068510 Lithographic apparatus and device manufacturing method
03/31/2005US20050068509 Methods and systems to compensate for a stitching disturbance of a printed pattern in a maskless lithography system utilizing overlap without an explicit attenuation
03/31/2005US20050068486 Double-sided LCD device
03/31/2005US20050068485 TFT active matrix liquid crystal display devices
03/31/2005US20050068467 Methods and systems to compensate for a stitching disturbance of a printed pattern in a maskless lithography system not utilizing overlap of the exposure zones
03/31/2005US20050068310 Electro-optical device and electronic apparatus
03/31/2005US20050068272 Electroluminescent display device and manufacturing method of the same
03/31/2005US20050068059 Suppressing the leakage current in an integrated circuit
03/31/2005US20050067953 Light emitting device and method for manufacturing the same
03/31/2005US20050067899 Semiconductor device and method for producing the same
03/31/2005US20050067766 Transporting apparatus
03/31/2005US20050067740 Wafer defect reduction by short pulse laser ablation
03/31/2005US20050067722 Semiconductor device which prevents peeling of low-permittivity film by using multilevel interconnection
03/31/2005US20050067721 Method of producing an electronic component and a panel with a plurality of electronic components
03/31/2005US20050067720 Heating mold and moving the mold surface to press the encapsulation layer on back surface of wafer so as not only to form a flat protection layer on back surface of wafer more quickly but also simplify the process flow by eliminating the step of smoothing the protecting layer
03/31/2005US20050067719 Semiconductor device and method for producing the same
03/31/2005US20050067717 Substrate having built-in semiconductor apparatus and manufacturing method thereof
03/31/2005US20050067716 Group III nitride based flip-chip integrated circuit and method for fabricating
03/31/2005US20050067715 Electronic parts built-in substrate and method of manufacturing the same
03/31/2005US20050067714 Method and apparatus for a dual substrate package
03/31/2005US20050067713 Semiconductor device and method of manufacturing semiconductor device
03/31/2005US20050067711 Providing a via with an increased via contact area
03/31/2005US20050067710 Define via in dual damascene process
03/31/2005US20050067709 metal reinforcing layer formed under and in contact with the wire bonding pad, stiffening the brittle inter-level dielectric, distributing bonding forces over an extended area
03/31/2005US20050067707 Semiconductor device and method for fabricating the same
03/31/2005US20050067706 Semiconductor device and production method thereof
03/31/2005US20050067705 Semiconductor device
03/31/2005US20050067704 Semiconductor device and method of manufacturing the same
03/31/2005US20050067703 Electronic member, method for making the same, and semiconductor device
03/31/2005US20050067702 Plasma surface modification and passivation of organo-silicate glass films for improved hardmask adhesion and optimal RIE processing
03/31/2005US20050067701 Metal-insulator-metal capacitor and method of fabrication
03/31/2005US20050067700 Semiconductor device and method of manufacturing the same
03/31/2005US20050067697 Apparatus for connecting an IC terminal to a reference potential
03/31/2005US20050067696 Semiconductor device and electronic apparatus equipped with the semiconductor device
03/31/2005US20050067693 Semiconductor device and manufacturing method thereof
03/31/2005US20050067689 Semiconductor module and method for producing a semiconductor module
03/31/2005US20050067688 Structure and method of making capped chips including vertical interconnects having stud bumps engaged to surfaces of said caps
03/31/2005US20050067686 Semiconductor device containing stacked semiconductor chips and manufacturing method thereof
03/31/2005US20050067684 Methods for assembling semiconductor devices in superimposed relation with adhesive material defining the distance adjacent semiconductor devices are spaced apart from one another
03/31/2005US20050067683 Memory expansion and chip scale stacking system and method
03/31/2005US20050067682 Semiconductor device containing stacked semiconductor chips and manufacturing method thereof
03/31/2005US20050067680 Castellated chip-scale packages and methods for fabricating the same
1 ... 3919 3920 3921 3922 3923 3924 3925 3926 3927 3928 3929 3930 3931 3932 3933 3934 3935 3936 3937 3938 3939 ... 6590