Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2005
03/31/2005US20050067679 Stitched micro-via to enhance adhesion and mechanical strength
03/31/2005US20050067678 Methods and apparatus for determining pad height for a wire-bonding operation in an integrated circuit
03/31/2005US20050067676 Method of forming a semiconductor package and structure thereof
03/31/2005US20050067675 Molded substrate for topograpy based lithography
03/31/2005US20050067673 Adjustable self-aligned air gap dielectric for low capacitance wiring
03/31/2005US20050067672 Semiconductor device and method for fabricating the same
03/31/2005US20050067671 Semiconductor device having fuse and capacitor at the same level and method of fabricating the same
03/31/2005US20050067670 Method and apparatus for using cobalt silicided polycrystalline silicon for a one time programmable non-volatile semiconductor memory
03/31/2005US20050067666 Device for electrical connection between two wafers and fabrication process of a microelectronic component comprising such a device
03/31/2005US20050067665 Semiconductor device including field-effect transistor using salicide (self-aligned silicide) structure and method of fabricating the same
03/31/2005US20050067664 MOSFET structures with conductive niobium oxide gates
03/31/2005US20050067663 Oxide-nitride stack gate dielectric
03/31/2005US20050067662 Transistor having a protruded drain and method of manufacturing the transistor
03/31/2005US20050067661 Semiconductor device with silicide film and method of manufacturing the same
03/31/2005US20050067660 Integrated semiconductor device providing for preventing the action of parasitic transistors
03/31/2005US20050067659 Memory cell with nanocrystals or nanodots
03/31/2005US20050067658 Dry etching method for semiconductor device
03/31/2005US20050067657 Semiconductor device
03/31/2005US20050067656 Process for fabricating thin film transistors
03/31/2005US20050067655 Metal-oxide-semiconductor device including a buried lightly-doped drain region
03/31/2005US20050067653 Vertical DMOS transistor device, integrated circuit, and fabrication method thereof
03/31/2005US20050067652 Nonvolatile semiconductor memory and a fabrication method thereof
03/31/2005US20050067651 Nonvolatile memory cell employing a plurality of dielectric nanoclusters and method of fabricating the same
03/31/2005US20050067649 Method for producing a ferroelectric capacitor and a ferroelectric capacitor device
03/31/2005US20050067648 Volatile memory devices and methods for forming same
03/31/2005US20050067647 Methods of forming dynamic random access memory trench capacitors
03/31/2005US20050067646 Volatile memory structure and method for forming the same
03/31/2005US20050067645 Semiconductor memory device and method of reading data
03/31/2005US20050067644 Device and a method for forming a capacitor device
03/31/2005US20050067643 Device and a method for forming a ferroelectric capacitor device
03/31/2005US20050067642 Process for fabrication of a ferrocapacitor
03/31/2005US20050067635 Method of manufacturing electronic component, method of manufacturing electro-optical device, electronic component, and electro-optical device
03/31/2005US20050067634 Nonvolatile integrated semiconductor memory
03/31/2005US20050067633 Microelectromechanical system and method for fabricating the same
03/31/2005US20050067632 Semiconductor device
03/31/2005US20050067631 Low noise vertical variable gate control voltage JFET device in a BiCMOS process and methods to build this device
03/31/2005US20050067628 Light emitting diode
03/31/2005US20050067626 LCD having semiconductor components
03/31/2005US20050067625 Semiconductor light-emitting device
03/31/2005US20050067624 Contacting scheme for large and small area semiconductor light emitting flip chip devices
03/31/2005US20050067621 Semiconductor device using MEMS switch
03/31/2005US20050067620 Three dimensional CMOS integrated circuits having device layers built on different crystal oriented wafers
03/31/2005US20050067619 Thin film semiconductor device and fabrication method therefor
03/31/2005US20050067618 Method of manufacturing semiconductor devices
03/31/2005US20050067617 Semiconductor device and manufacturing method thereof
03/31/2005US20050067614 Semiconductor substrate
03/31/2005US20050067468 Applying flux on substrate having solder bumps, flux including solvent and water soluble monomer or water soluble polymer; placing die on substrate and reflowing die in oven at reflow temperature to redistribute stress caused by coefficient of thermal expansion mismatch between substrate and die
03/31/2005US20050067462 Wire bonder with a downholder for pressing the fingers of a system carrier onto a heating plate
03/31/2005US20050067392 Dividing method and apparatus for sheet-shaped workpiece
03/31/2005US20050067391 Methods for laser scribing wafers
03/31/2005US20050067384 Laser thermal annealing of lightly doped silicon substrates
03/31/2005US20050067377 Germanium-on-insulator fabrication utilizing wafer bonding
03/31/2005US20050067297 Copper bath for electroplating fine circuitry on semiconductor chips
03/31/2005US20050067295 Deep via seed repair using electroless plating chemistry
03/31/2005US20050067294 SOI by oxidation of porous silicon
03/31/2005US20050067186 Hybrid integrated circuit device and method of manufacturing the same
03/31/2005US20050067177 Module and method of manufacturing module
03/31/2005US20050067104 Surface treatment apparatus and method for manufacturing liquid crystal display device
03/31/2005US20050067101 Semiconductor manufacturing apparatus and manufacturing method of semiconductor device
03/31/2005US20050067100 Apparatus and method for removing coating film
03/31/2005US20050067098 Method and system for introduction of an active material to a chemical process
03/31/2005US20050067097 Releasing method and releasing apparatus of work having adhesive tape
03/31/2005US20050067055 Thin buried oxides by low-dose oxygen implantation into modified silicon
03/31/2005US20050067002 Processing chamber including a circulation loop integrally formed in a chamber housing
03/31/2005US20050067001 immersion or wet processing and cleaning of microelectronic devices; drying gas curtains
03/31/2005US20050066995 Non-hermetic encapsulant removal for module rework
03/31/2005US20050066994 metal etching substrates in IC manufacturing; oxygen-containing gas during the dechuck process
03/31/2005US20050066993 Thin film forming apparatus and method of cleaning the same
03/31/2005US20050066902 Method and apparatus for plasma processing
03/31/2005US20050066899 Method for depositing a film using a charged particle beam, method for performing selective etching using the same, and charged particle beam equipment therefor
03/31/2005US20050066895 CVD of PtRh with good adhesion and morphology
03/31/2005US20050066892 Deposition of silicon-containing films from hexachlorodisilane
03/31/2005US20050066887 Semiconductor device and method of fabricating semiconductor device
03/31/2005US20050066886 Method of fabrication of a substrate for an epitaxial growth
03/31/2005US20050066885 Group III-nitride semiconductor substrate and its manufacturing method
03/31/2005US20050066883 Methods, devices and compositions for depositing and orienting nanostructures
03/31/2005US20050066880 Process for preparing a bonding type semiconductor substrate
03/31/2005US20050066585 Comprises oxidizer (hydrogen peroxide), inhibitor of nonferrous metal, abrasive, complexing agent, imine derivatives (acetamidine hydrochloride), hydrazine derivatives (carbohydrazide), and water; for use with polyurethane polishing pads; for semiconductor substrates
03/31/2005US20050066523 Method of making an interposer with contact structures
03/31/2005DE69728648T2 Halbleitervorrichtung mit hochfrequenz-bipolar-transistor auf einem isolierenden substrat A semiconductor device having high-frequency bipolar transistor on an insulating substrate
03/31/2005DE60009709T2 Verfahren und vorrichtung für eine abtastprüfung mit flexibele auswahl Method and apparatus for a scan test with flexible selection
03/31/2005DE4027236B4 Verfahren zur Herstellung von Filmen aus amorphem Silicium und einen solchen Film verwendende Photohalbleiter-Vorrichtung A process for the preparation of films from amorphous silicon, and such a film used photo semiconductor device
03/31/2005DE19826689B4 Halbleiterbauelement und Herstellungsverfahren eines Halbleiterbauelementes A semiconductor device and manufacturing method of a semiconductor device
03/31/2005DE19739073B4 Verfahren zur Herstellung von Metall-Bumps auf einer elektronischen Vorrichtung A process for the production of metal bumps on an electronic device
03/31/2005DE19629286B4 Polierkissen und Poliervorrichtung The polishing pad and polishing apparatus
03/31/2005DE10355225B3 Making trench capacitor with insulating collar in substrate for use as semiconductor memory cell, employs selective masking, filling, lining and removal techniques
03/31/2005DE10341186A1 Verfahren und Vorrichtung zum Kontaktieren von Halbleiterchips Method and apparatus for bonding semiconductor chips
03/31/2005DE10340926A1 Verfahren zur Herstellung von elektronischen Bauelementen A process for the production of electronic components
03/31/2005DE10339997A1 Substrate or carrier for a wafer for semiconductor technology and manufacturing microelectronic circuits having two insulated activation electrodes
03/31/2005DE10339990A1 Metalleitung mit einer erhöhten Widerstandsfähigkeit gegen Elektromigration entlang einer Grenzfläche einer dielektrischen Barrierenschicht mittels Implantieren von Material in die Metalleitung Metal line with an increased resistance to electromigration along a boundary surface of a dielectric barrier layer by implanting material into the metal line
03/31/2005DE10339988A1 Verfahren zur Herstellung einer TEOS-Deckschicht bei geringer Temperatur und reduzierter Abscheiderate A process for the preparation of a TEOS cap layer at a low temperature and reduced deposition rate
03/31/2005DE10339487A1 Semiconductor chip manufacture system for formation of chips on semiconductor wafer involves formation of pits in rear surface, plating with solder and application of solder to fill pits
03/31/2005DE10339462A1 Process for fixing a rigid connecting loop or leg to a connecting surface of a semiconductor chip in the manufacture of semiconductor components
03/31/2005DE10338665A1 Production of insulating regions in semiconductor memories comprises forming a hard mask with openings in a region of a stronger electrical insulation and in a region of a weaker electrical insulation on a substrate, and further processing
03/31/2005DE10337767A1 Verfahren zur Messung der Overlay-Verschiebung A method of measuring the overlay displacement
03/31/2005DE10330506A1 Vorrichtung zur Waferinspektion Apparatus for wafer inspection
03/31/2005DE102004042761A1 Sensoranordnung eines Kapazitätstyps für eine dynamische Grösse A capacitance type sensor arrangement for a dynamic size
03/31/2005DE102004042042A1 Memory module has secondary memory chips mounted over one of primary memory chips electrically connected to conductive pattern, so that primary memory chip mounted below secondary memory chip is disabled
03/31/2005DE102004040997A1 Isolierschichttransistor mit eingebauter Diode Insulated with built-in diode
03/31/2005DE102004035617A1 Verfahren zur Herstellung von Substraten für Fotomaskenrohlinge Process for the preparation of substrates for photomask blanks
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