Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
04/2005
04/05/2005US6875282 Substrate transport container
04/05/2005US6875281 Method and system for coating and developing
04/05/2005US6875280 Substrate processing apparatus and substrate processing method
04/05/2005US6875273 Method and system for manufacturing III-V Group compound semiconductor and III-V Group compound semiconductor
04/05/2005US6875272 Method for preparing GaN based compound semiconductor crystal
04/05/2005US6875271 Simultaneous cyclical deposition in different processing regions
04/05/2005US6875268 Method of improving a surface of a substrate for bonding
04/05/2005US6875262 Silica-based coating film on substrate and coating solution therefor
04/05/2005US6875260 Copper activator solution and method for semiconductor seed layer enhancement
04/05/2005US6875163 Industrial sponge roller device having reduced residuals
04/05/2005US6875096 Chemical mechanical polishing pad having holes and or grooves
04/05/2005US6875089 Constant pH polish and scrub
04/05/2005US6875088 Polishing member and method of manufacturing semiconductor device
04/05/2005US6875082 Nitride semiconductor wafer and method of processing nitride semiconductor wafer
04/05/2005US6874989 Vacuum pump
04/05/2005US6874929 Apparatus and method for supplying chemicals
04/05/2005US6874898 Thin film apparatus, a manufacturing method of the thin film apparatus, an active matrix substrate, a manufacturing method of the active matrix substrate, and an electro-optical apparatus having the active matrix substrate
04/05/2005US6874770 High flow rate bubbler system and method
04/05/2005US6874700 Contamination control method and apparatus, and air-conditioning system of a substrate processing facility employing the same
04/05/2005US6874673 Initial ball forming method for wire bonding wire and wire bonding apparatus
04/05/2005US6874662 Liquid crystal dispensing apparatus
04/05/2005US6874638 Wafer cassette
04/05/2005US6874516 Substrate cleaning apparatus
04/05/2005US6874515 Substrate dual-side processing apparatus
04/05/2005US6874513 High pressure processing apparatus
04/05/2005US6874511 Gas containing depositable constituents in the exhaust area is intermittently pumped out of a vacuum chamber connected to a vacuum pump via a gas line, and a reactive gas that removes deposits is intermittently added; etching silicon
04/05/2005US6874510 Method to use a laser to perform the edge clean operation on a semiconductor wafer
04/05/2005US6874443 Layer-by-layer etching apparatus using neutral beam and etching method using the same
04/05/2005US6874369 Stress measurement method using X-ray diffraction
04/05/2005US6874225 Electronic component mounting apparatus
04/05/2005CA2374373C Improved ceria powder
04/05/2005CA2329816C Wafer holder for semiconductor manufacturing apparatus, method of manufacturing wafer holder, and semiconductor manufacturing apparatus
04/03/2005CA2480837A1 Nitride semiconductor substrate and method of producing same
03/2005
03/31/2005WO2005029605A1 Field effect type organic transistor and process for production thereof
03/31/2005WO2005029590A1 Lateral short-channel dmos, method for manufacturing same and semiconductor device
03/31/2005WO2005029588A1 Nitride semiconductor device and method for manufacturing same
03/31/2005WO2005029587A1 Nitride semiconductor device
03/31/2005WO2005029586A1 Dynamic control of capacitance elements in field effect semiconductor devices
03/31/2005WO2005029584A1 Semiconductor integrated circuit
03/31/2005WO2005029583A2 Schottky barrier integrated circuit
03/31/2005WO2005029580A2 Connector
03/31/2005WO2005029579A1 Method and apparatus for fabricating cmos field effect transistors
03/31/2005WO2005029578A1 Semiconductor device, method of manufacturing same, identification label and information carrier
03/31/2005WO2005029577A1 Interconnection structure with low dielectric constant
03/31/2005WO2005029576A2 Glass-based soi structures
03/31/2005WO2005029575A1 Structure of probe needle for probe card
03/31/2005WO2005029574A1 Collet, die bonder, and chip pick-up method
03/31/2005WO2005029573A1 Fabrication of semiconductor devices
03/31/2005WO2005029572A1 Fabrication of conductive metal layer on semiconductor devices
03/31/2005WO2005029570A1 Dram access transistor and method of formation
03/31/2005WO2005029569A1 Silicon wafer reclamation method and reclaimed wafer
03/31/2005WO2005029568A2 INTERFACIAL OXIDATION PROCESS FOR HIGH-k GATE DIELECTRIC PROCESS INTEGRATION
03/31/2005WO2005029567A1 Method of forming dielectric layers with low dielectric constants
03/31/2005WO2005029565A1 Production of insulating film with low dielectric constant
03/31/2005WO2005029564A1 Member for plasma etching device and method for manufacture thereof
03/31/2005WO2005029563A1 Polishing composition for silicon wafer and polishing method
03/31/2005WO2005029562A1 Method of substrate processing and apparatus for substrate processing
03/31/2005WO2005029561A1 Heat treatment apparatus
03/31/2005WO2005029560A1 Method of epitaxial growth and substrate for epitaxial growth
03/31/2005WO2005029559A1 Exposure apparatus and device producing method
03/31/2005WO2005029558A1 Semiconductor wafer location sensing via non contact methods
03/31/2005WO2005029556A2 Method of filling structures for forming via-first dual damascene interconnects
03/31/2005WO2005029551A2 Processes and systems for laser crystallization processing of film regions on a substrate utilizing a line-type beam, and structures of such film regions
03/31/2005WO2005029549A2 Method and system for facilitating bi-directional growth
03/31/2005WO2005029548A2 System and process for providing multiple beam sequential lateral solidification
03/31/2005WO2005029547A2 Enhancing the width of polycrystalline grains with mask
03/31/2005WO2005029545A2 Self-aligned planar double-gate process by self-aligned oxidation
03/31/2005WO2005029544A2 Systems and methods for processing thin films
03/31/2005WO2005029543A2 Laser-irradiated thin films having variable thickness
03/31/2005WO2005029540A2 Substrate carrier for electroplating solar cells
03/31/2005WO2005029504A2 Methods for identifying non-volatile memory elements with poor subthreshold slope or weak transconductance
03/31/2005WO2005029450A1 Electrode wiring substrate and display device
03/31/2005WO2005029329A2 A system and method for testing and configuring semiconductor functional circuits
03/31/2005WO2005029184A2 Positive photoresist composition and resist pattern formation
03/31/2005WO2005029183A2 Method and apparatus for protecting a reticle used in chip production from contamination
03/31/2005WO2005029180A2 Applications of semiconductor nano-sized particles for photolithography
03/31/2005WO2005029138A2 Systems and methods for inducing crystallization of thin films using multiple optical paths
03/31/2005WO2005028994A2 System and method for integrated multi-use optical alignment
03/31/2005WO2005028705A1 Apparatus and method of detecting the electroless deposition endpoint
03/31/2005WO2005028703A1 Film-forming apparatus and film-forming method
03/31/2005WO2005028663A2 Operator independent programmable sample preparation and analysis system
03/31/2005WO2005028360A1 Etch masks based on template-assembled nanoclusters
03/31/2005WO2005028339A1 Substrate containing case
03/31/2005WO2005017981A3 Dynamic metrology sampling methods
03/31/2005WO2005017962A9 System and process for producing nanowire composites and electronic substrates therefrom
03/31/2005WO2005013379A3 Method for the production of a plurality of opto-electronic semiconductor chips and opto-electronic semiconductor chip
03/31/2005WO2005013317A3 Stressed semiconductor-on-insulator structure resistant to high-temperature stress
03/31/2005WO2005013316A3 Method for the production of a plurality of opto-electronic semiconductor chips and opto-electronic semiconductor chip
03/31/2005WO2005006440A3 Non-volatile semiconductor memory
03/31/2005WO2005006411A3 Feedforward, feedback wafer to wafer control method for an etch process
03/31/2005WO2005002794A3 Cell, system and article for electrochemical mechanical processing (ecmp)
03/31/2005WO2004114373A3 Stud formation for mram manufacturing
03/31/2005WO2004114371A3 Compound used to form a self-assembled monolayer, layer structure, semiconductor component having a layer structure, and method for producing a layer structure
03/31/2005WO2004114334A3 Method of patterning a magnetic memory cell bottom electrode before magnetic stack deposition
03/31/2005WO2004110657A9 Uniform cavitation for particle removal
03/31/2005WO2004100259A3 Semi-conductor component and method for the production of a semi-conductor component
03/31/2005WO2004095112A3 Cmos-compatible integration of silicon-based optical devices with electronic devices
03/31/2005WO2004093177B1 Polishing pad and method for producing same
03/31/2005WO2004091269A3 Method for production of (opto)electronic housings with a ceramic base for thermal regulation and dissipation by means of a thermoelectric (peltier) effect
03/31/2005WO2004088425A3 Contact masks and lithographic patterning methods using said masks
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